Array Substrate Overlapping Electrodes Wiring Space
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Solution Overview
Problem
High-resolution display panels face challenges in achieving better display performance due to limited wiring space, which makes it difficult to form multiple signal lines parallel to the extension direction of the scan line, affecting the light emitting area and storage capacitor performance.
Innovation Solution
The array substrate design includes a substrate with multiple metal layers forming overlapping electrodes and signal lines, allowing for the formation of an initialization signal line by the third metal layer, increasing the storage capacitor area, and optimizing the arrangement to reduce wiring space and enhance light emitting performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple signal lines are formed parallel to the scan line extension direction, then display performance is improved, but wiring space becomes insufficient
Solution Approach 1:
The patent transitions from planar wiring to three-dimensional stacked wiring by forming signal lines in multiple metal layers (first, second, and third signal lines in different layers). This vertical stacking approach allows multiple signal lines to coexist without occupying additional horizontal wiring space, thereby maintaining display performance while solving the wiring space constraint in high-resolution displays.
2Adaptability or versatility
If initialization signal line is added, then pixel circuit functionality is improved, but wiring space is reduced
Solution Approach 1:
The initialization signal line is formed in the third metal layer, utilizing the vertical stacking approach. This allows the initialization signal line to be added to the pixel circuit without occupying additional horizontal wiring space, as it is positioned above the other signal lines in the third dimension.
Solution Approach 2:
The third metal layer serves multiple functions by forming both the third signal line and the initialization signal line. This multi-functionality approach allows the pixel circuit to gain additional functionality without requiring separate dedicated wiring space for each signal line.
3Reliability
If storage capacitor area is increased, then pixel circuit performance is improved, but light emitting area is reduced
Solution Approach 1:
The storage capacitor is formed by overlapping the first electrode (in the first metal layer) and the second electrode (in the second metal layer) in the vertical direction. This three-dimensional capacitor structure increases the effective capacitor area without occupying additional horizontal space, thereby improving pixel circuit performance while maintaining the light emitting area.
Data Source
AI summary
An array substrate includes: a substrate; a first metal layer, disposed on the substrate, the first metal layer forming a gate electrode, a scan line and a first electrode, the scan line extending along a first direction in a plane of a surface of the substrate; a first insulation layer, disposed on the first metal layer; a second metal layer, disposed on the first insulation layer, the second metal layer forming a second electrode, projections of the first electrode and the second electrode on the substrate at least partly overlapping one another; a second insulation layer, disposed on the second metal layer; and a third metal layer, disposed on a side of the second insulation layer away from the second metal layer, the third metal layer forming an initialization signal line.