Solid-State Devices TRIZ Cases

A bank insulating layer determines organic semiconductor positioning using half-tone photolithography.

Recessing the active region before well dopant implantation prevents sidewall exposure during epitaxial growth, reducing threshold voltage variability.

A foldable display apparatus uses overlapping thin light shielding members with a specific adhesive layer to maintain high light blocking performance.

Temporary protection layers and dam structures shield image sensor lenses from mold compound interference, enabling tighter keep-out zones in stacked packages.

Recessed connection terminals enable sequential insulating layer deposition and single-step etching in display manufacturing.

Stacked metal layers form overlapping electrodes to increase storage capacitor area in array substrates.

A nonvolatile memory cell uses PMOS channel capacitance for writing and n-type depletion MOS transistor coupling for erasure.

Multi-surface substrate routing connects light-emitting elements in series and parallel, reducing device footprint while balancing resistance.

Merging spacer formation with pixel electrode definition reduces photomask count and lowers fabrication costs while maintaining precise substrate spacing.

A re-adherable tray surface secures integrated circuit dies during automated handling and transport.

A display apparatus power supply line uses a clad conductive structure to maintain reliable electrical connections in the peripheral area.

Multi-layer sidewall insulators on stacked electrodes suppress short-channel effects and leakage current while maintaining high device density.

Multi-layer electrodes with reflectance reducing layers prevent chuck blot and improve contrast ratio by absorbing stray light.

Retaining the gate hard mask layer during etching protects vertical pillar patterns from bending while reducing word line resistance.

Concentric ring grooves on transparent lens substrates redirect high-angle light paths, eliminating flare and ghosting artifacts in multi-array imaging systems.

Segmented word lines in a ferroelectric transistor matrix suppress write disturb and minimize gate insulator film deterioration during data writing.

A multi-threshold CRT readout circuit uses a flash ADC to timestamp SiPM signals.

Side-mounted extraction patterns prevent total internal reflection at the substrate interface, increasing light output by 16%.

Test control circuit connects through electrodes to resistors for voltage level detection, diagnosing open and short failures in stacked semiconductor devices.

Distinct trap levels optimize charge storage efficiency while reducing cell size to increase memory capacity.

Surface energy differentiation guides inkjet printing to form pixel definition walls, preventing overflow and improving organic insulating material utilization.

A pattern forming method trims a first mask and etches a boundary layer to create a second mask without secondary exposure.

Merging the p-well connection with the source line eliminates separate drivers, reducing chip area while accelerating voltage stabilization.

A light-emitting element design manages planar area of active layers to maintain consistent current distribution across spaced cells.

Segmented banks and intermediary circuitry prevent polarization reversal, eliminating the need for immediate re-write after reading.

A photoelectric conversion layer combines oligothiophene and fullerene to boost charge mobility.

A shared transparent semiconductor layer serves as both photosensitive element and conductive electrode in display panel fabrication.

Lyophilic and lyophobic layers prevent direct contact between charge transporting layers, reducing leakage current and improving device reliability.

Transparent material layers eliminate air gaps between microlenses and protection covers, preventing flare from refractive index mismatches.

Planar arrangement of gate driving circuit regions enables well sharing between the level shifter and output buffer unit, reducing layout area.

Segmented conductive islands block electromagnetic interference while preserving touch signal sensitivity and light transmittance.

An intermediate and semi-transparent layer stack minimizes external light reflection to improve contrast without sacrificing luminance.

Silicide-block silicon dioxide protects the polysilicon gate electrode, eliminating parasitic diodes to ensure long-term charge retention.

Liquid crystal molecules reorient via a tip electrode structure to switch the viewing angle, eliminating manual privacy film attachment.

A stitch bump stacking design connects multiple bond wires to a single contact point on a substrate.

A channel protective film shields the active layer during data line formation to maintain high aperture ratio.

Resin-filled grooves prevent film peeling and cracks during dicing, maintaining moisture-proof integrity.

Magnetic holding replaces electrostatic fields to prevent electrification damage during micro LED transfer.

Stacked p-n junctions with electrically shorted contacts enable selective signal current sensing in semiconductor photodiodes.

A reflection layer in transparent OLED panels creates an overlap region that expands the light-emitting area beyond traditional planar boundaries.

A crack detection pattern sits in a groove on the compensation layer of a display device to monitor structural integrity.

Supporters prevent insulation layer leaning in vertical memory devices, maintaining channel alignment accuracy.

Diagnose angular position sensor faults using linear combinations of polyphase signals and elementary logic operations.

Segmented charge accumulation regions connect to external wiring via insulated contacts, suppressing noise during charge transfer.

Alcohol heat treatment stabilizes OLED emitter doping ratios, preventing dissipation mismatches that degrade light efficiency.

A programmable charge-storage transistor uses a composite ferroelectric and non-ferroelectric gate stack to manage electrical charge efficiently.

An amphiphilic moisture layer modifies surface tension to ensure uniform organic ink distribution, reducing encapsulation failure rates.

An absorbent material layer covers metal elements in an image sensor to absorb parasitic light rays, eliminating ghost images and halos caused by reflections.

Segmented mask films with differential etch rates resolve the trade-off between etching depth and hole uniformity in high aspect ratio fabrication.

Shared white EL layers and specific color filters resolve the trade-off between manufacturing complexity and wide color gamut in displays.