Solid-State Devices TRIZ Cases

A bank insulating layer determines organic semiconductor positioning using half-tone photolithography.

Recessing the active region before well dopant implantation prevents sidewall exposure during epitaxial growth, reducing threshold voltage variability.

A foldable display apparatus uses overlapping thin light shielding members with a specific adhesive layer to maintain high light blocking performance.

Temporary protection layers and dam structures shield image sensor lenses from mold compound interference, enabling tighter keep-out zones in stacked packages.

Recessed connection terminals enable sequential insulating layer deposition and single-step etching in display manufacturing.

Stacked metal layers form overlapping electrodes to increase storage capacitor area in array substrates.

A nonvolatile memory cell uses PMOS channel capacitance for writing and n-type depletion MOS transistor coupling for erasure.

Multi-surface substrate routing connects light-emitting elements in series and parallel, reducing device footprint while balancing resistance.

Merging spacer formation with pixel electrode definition reduces photomask count and lowers fabrication costs while maintaining precise substrate spacing.

A re-adherable tray surface secures integrated circuit dies during automated handling and transport.

A display apparatus power supply line uses a clad conductive structure to maintain reliable electrical connections in the peripheral area.

Multi-layer sidewall insulators on stacked electrodes suppress short-channel effects and leakage current while maintaining high device density.

Multi-layer electrodes with reflectance reducing layers prevent chuck blot and improve contrast ratio by absorbing stray light.

Retaining the gate hard mask layer during etching protects vertical pillar patterns from bending while reducing word line resistance.

Concentric ring grooves on transparent lens substrates redirect high-angle light paths, eliminating flare and ghosting artifacts in multi-array imaging systems.

Segmented word lines in a ferroelectric transistor matrix suppress write disturb and minimize gate insulator film deterioration during data writing.

A multi-threshold CRT readout circuit uses a flash ADC to timestamp SiPM signals.

Side-mounted extraction patterns prevent total internal reflection at the substrate interface, increasing light output by 16%.

Test control circuit connects through electrodes to resistors for voltage level detection, diagnosing open and short failures in stacked semiconductor devices.

Distinct trap levels optimize charge storage efficiency while reducing cell size to increase memory capacity.

Surface energy differentiation guides inkjet printing to form pixel definition walls, preventing overflow and improving organic insulating material utilization.

A pattern forming method trims a first mask and etches a boundary layer to create a second mask without secondary exposure.

Merging the p-well connection with the source line eliminates separate drivers, reducing chip area while accelerating voltage stabilization.

A light-emitting element design manages planar area of active layers to maintain consistent current distribution across spaced cells.

Segmented banks and intermediary circuitry prevent polarization reversal, eliminating the need for immediate re-write after reading.

A photoelectric conversion layer combines oligothiophene and fullerene to boost charge mobility.

A shared transparent semiconductor layer serves as both photosensitive element and conductive electrode in display panel fabrication.

Lyophilic and lyophobic layers prevent direct contact between charge transporting layers, reducing leakage current and improving device reliability.

Transparent material layers eliminate air gaps between microlenses and protection covers, preventing flare from refractive index mismatches.

Planar arrangement of gate driving circuit regions enables well sharing between the level shifter and output buffer unit, reducing layout area.

Segmented conductive islands block electromagnetic interference while preserving touch signal sensitivity and light transmittance.

An intermediate and semi-transparent layer stack minimizes external light reflection to improve contrast without sacrificing luminance.

Silicide-block silicon dioxide protects the polysilicon gate electrode, eliminating parasitic diodes to ensure long-term charge retention.

Liquid crystal molecules reorient via a tip electrode structure to switch the viewing angle, eliminating manual privacy film attachment.

A stitch bump stacking design connects multiple bond wires to a single contact point on a substrate.

A channel protective film shields the active layer during data line formation to maintain high aperture ratio.

Resin-filled grooves prevent film peeling and cracks during dicing, maintaining moisture-proof integrity.

Magnetic holding replaces electrostatic fields to prevent electrification damage during micro LED transfer.

Stacked p-n junctions with electrically shorted contacts enable selective signal current sensing in semiconductor photodiodes.

A reflection layer in transparent OLED panels creates an overlap region that expands the light-emitting area beyond traditional planar boundaries.

A crack detection pattern sits in a groove on the compensation layer of a display device to monitor structural integrity.

Supporters prevent insulation layer leaning in vertical memory devices, maintaining channel alignment accuracy.

Diagnose angular position sensor faults using linear combinations of polyphase signals and elementary logic operations.

Segmented charge accumulation regions connect to external wiring via insulated contacts, suppressing noise during charge transfer.

Alcohol heat treatment stabilizes OLED emitter doping ratios, preventing dissipation mismatches that degrade light efficiency.

A programmable charge-storage transistor uses a composite ferroelectric and non-ferroelectric gate stack to manage electrical charge efficiently.

An amphiphilic moisture layer modifies surface tension to ensure uniform organic ink distribution, reducing encapsulation failure rates.

An absorbent material layer covers metal elements in an image sensor to absorb parasitic light rays, eliminating ghost images and halos caused by reflections.

Segmented mask films with differential etch rates resolve the trade-off between etching depth and hole uniformity in high aspect ratio fabrication.

Shared white EL layers and specific color filters resolve the trade-off between manufacturing complexity and wide color gamut in displays.

A mixed layer containing hole and electron transfer materials forms a charge transfer complex within an organic light-emitting device.

Remove oxygen from processing chamber via evacuation or nitrogen displacement to prevent dielectric layer degradation and maintain high K material integrity.

Segmented etching with a protective sleeve prevents sidewall contamination, enhancing pixel isolation and quantum efficiency.

Alternating p and n regions distribute ESD current through the substrate, preventing thermal overload in MEMS elements that lack available MOS transistors.

Automated algorithms place oxide pillar slots on recess oxide patterns, eliminating manual positioning errors and improving manufacturing precision.

Dual mask patterning reduces production costs by reusing structures across distinct substrate regions.

A silyl-substituted cyclometalated transition metal complex emits light via triplet metal-to-ligand charge transfer states.

Eliminating stepped surfaces in alternating stacks through preliminary via cavity formation to maintain device integrity.

Integrating capacitive fingerprint electrodes into a flexible touch panel eliminates dedicated scanner space while maintaining high resolution.

Pits on the high resistivity silicon plate increase surface resistance, reducing eddy currents that cause signal loss and poor linearity.

A flat display apparatus integrates a touch screen layer protected by an inorganic barrier and organic filler to enhance adhesion.

Selective epitaxy builds a tri-layer passivation structure that reduces lateral undercutting and repairs crystalline defects in deep trench isolation.

A laminate processing method uses a cutting blade and expandable tape to divide glass substrates into individual image sensor chips.

A semiconductor storage device controller determines program voltages based on memory cell loop counts.

A tertradentate platinum complex with a pyridoimidazole carbene ligand delivers stable blue light emission for organic light-emitting devices.

A vertical transistor pillar incorporates an electric field-buffering region on its sidewall to manage charge distribution.

Nitrogen-doped antiferroelectric hafnium oxide increases charge storage density to reduce memory hole diameters and cell thickness.

Vertical stacking of word lines and bit lines increases integration density without requiring advanced lithography equipment.

A conductive shielding layer with grounding voltage minimizes signal distortion and maintains integrity in stacked 3D memory architectures.

Embedding isolated photo-diodes in interconnection layers increases fill-factor and reduces crosstalk for higher signal-to-noise ratio.

A light-transmissive cover with convex and concave portions uniformly covers multiple LED chips to optimize light distribution.

A microvalve design uses segmented actuator ribs connected through a central spine to create electrical isolation regions within the device structure.

Crack stoppers in the non-display area block moisture permeation through encapsulation cracks, enhancing reliability.

A 3D memory device structure with page buffers in a separate die level electrically coupled to array sub-arrays via inter-die connections.

Single-layer molybdenum electrodes replace ITO to eliminate high-temperature annealing and improve scratch resistance.

Opaque cover portion absorbs light to assist sealing, resolving slow touch response speed in display apparatuses.

Selective ion implantation stabilizes impurity distribution to decrease interface resistance between barrier metal and polycrystalline silicon films.

Masked polysilicon regions block n-type dopant cross-diffusion, reducing TOXINV variability and maintaining SRAM stability during tight design rule scaling.

A phase change random access memory heating electrode uses barium titanate to increase specific resistance as temperature rises.

An etch stop layer pattern on contact plugs maintains uniform interlayer heights in vertical non-volatile memory devices.

A homogeneous emissive layer combines two organic phosphorescent materials with closely spaced peak wavelengths to produce a concentration-weighted average emission spectrum.

Graded p-type doping across segmented hole transporting layers reduces Joule heating and driving voltage, extending device lifespan.

A pixel element uses charged particles in an adjustment layer to control light transmission via electric fields.

An air grid structure isolates sensing regions in image sensors to minimize optical interference between adjacent color filters.

A stress distribution portion at the OLED edge uses insulating layers to manage mechanical forces during manufacturing.

A third insulating layer covers depression points between conductive layers to ensure uniform thickness and prevent electrical shorts.

A Pd electrode segmentation method uses liquid spray jets to peel off excess material from insulating films.

Alternating inorganic and organic patterns in a pixel definition layer reduce bottom protrusions during laser transfer, improving OLED pattern quality.

Substituted imidazole carbene ligands stabilize metal complexes in organic light emitting devices.

Optical clear adhesive fills accessory holes in OLED window regions, eliminating air gaps that degrade display uniformity and allow moisture ingress.

An array substrate uses a light shielding layer connected to power supply lines to form additional capacitance, reducing current-resistance drop and data loss.

A transparent dielectric layer on a flip-chip LED contact electrode minimizes metal reflection absorption loss to boost light extraction efficiency.

Segmented shadow masks enable delta subpixel arrangements that overcome structural strength limits to achieve resolution beyond 200 ppi.

Segmented MOS transistors with ion-implanted tips boost the coupling coefficient to accelerate programming speed and preserve data integrity.

Unified patterning aligns through holes to prevent overetching or underetching, simplifying high-PPI LTPS substrate manufacturing.

A thin-film transistor array substrate uses distinct ion doping in source and drain contact portions to form p-n junctions that lower contact resistance.

A liquid crystal display uses a barrier pattern on an insulating layer to reduce the non-display area.

A distance measurement device uses phase-based control pulse voltages to modulate charge storage in a photoelectric conversion unit for precise detection.

High-resistance connectors isolate short-circuit defects in OLEDs, preventing failure without increasing device thickness or manufacturing costs.

Fluorosurfactants modify surface energy to prevent solution spillage and ensure uniform film formation within defined well regions.