Re-adherable IC Handling Tray for ESD Protection
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Solution Overview
Problem
Integrated circuit dies are prone to damage during shipping and handling due to improper handling and electrostatic discharge (ESD) events, with current precautions still resulting in over 30% of circuits being damaged.
Innovation Solution
An integrated circuit handling tray with a re-adherable surface that securely holds dies in place without causing damage, allowing for automated placement and removal, and optionally includes an ESD protection film to prevent damage from ESD events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If integrated circuits are manually extracted from shipping boxes by test operators, then the circuits can be handled and processed, but the circuits are prone to damage due to improper handling
Solution Approach 1:
The patent introduces an intermediary handling system consisting of trays with re-adherable surfaces and automated pick-and-place tools. These intermediaries transfer the circuits between shipping containers and processing equipment, eliminating direct manual contact and reducing damage risk while maintaining operational capability
Solution Approach 2:
The re-adherable surface on the trays provides self-service functionality by automatically securing circuits in place during transport and allowing automated retrieval during processing. The surface adheres to circuits during shipping but releases them when a pick-and-place tool applies predetermined force, enabling automated handling without manual intervention
2Adaptability or versatility
If integrated circuits are transported in shipping containers between manufacturing facilities, then the circuits can be moved between locations, but the circuits are damaged due to electrostatic discharge (ESD) events
Solution Approach 1:
The patent applies beforehand cushioning by placing ESD protection film over the integrated circuits before shipping. This protective layer is applied in advance to prevent ESD damage during transportation, allowing the circuits to be safely transported between facilities without suffering from electrostatic discharge events
3Reliability
If current precautionary steps and automated tools are used to prevent damage during transfer, then some protection is provided, but still more than 30% of integrated circuits are damaged due to improper handling
Solution Approach 1:
The patent creates a universal handling system where standardized trays with re-adherable surfaces can be used across different manufacturing facilities and for different types of integrated circuits. This multi-functional approach simplifies procedures by providing a single, standardized method that works universally, reducing the complexity of handling procedures while improving reliability through consistent application
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The tray effectively reduces manual handling errors and protects integrated circuits from ESD, significantly lowering the risk of damage during transportation and processing, thereby improving the reliability of integrated circuit handling and processing operations.
Implementation Method 1
integrated circuit dies placed at a predetermined position on the re-adherable surface are held in that position as result of the adhesive properties of the surface
Implementation Method 2
integrated circuits are damaged due to electrostatic discharge (ESD) events while being transported in a shipping container
Data Source
AI summary
In one embodiment, a tray that includes a dielectric frame structure, a re-adherable pad and a marking is disclosed. The dielectric frame structure includes a recessed region where the re-adherable pad is formed. A plurality of integrated circuits is placed on a re-adherable surface of the re-adherable pad. The marking on the dielectric frame that is reflective of a given input-output pin position for each integrated circuit in the plurality of integrated circuits in the tray. In addition to that, two methods are also disclosed. First, a method of handling the integrated circuits using the tray is disclosed. Second, a method of forming the tray is also disclosed.


