Pattern Formation via Sidewall Etching for Sub-Resolution Patterning

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Solution Overview

Problem

Conventional double patterning techniques for semiconductor device manufacturing are complex, costly, and struggle to form microscopic patterns finer than the exposure limit, with difficulties in accurate alignment and patterning due to the need for multiple exposure processes.

Innovation Solution

A pattern forming method that involves a first pattern formation, trimming, boundary layer formation, and selective etching to create a second pattern without a second exposure process, using a photoresist and inorganic materials to simplify the process and reduce costs, while enabling the formation of finer patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If double patterning technique is used to form finer patterns, then pattern resolution is improved, but process complexity increases and manufacturing cost increases

Engineering Contradiction:
Improvepattern resolutionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the pattern formation process into distinct stages: first forming a mandrel pattern, then forming sidewall structures, and finally forming the final pattern. This segmentation allows each stage to be optimized independently, achieving fine pattern resolution without requiring complex multi-exposure processes. The mandrel structure is divided into separate formation and removal stages, simplifying the overall process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by forming the mandrel pattern and sidewall structures before the final pattern definition. The mandrel is formed in advance with controlled dimensions, and sidewall materials are deposited beforehand to establish the geometric framework. This preliminary structuring enables the final pattern to be formed with high precision without requiring complex real-time adjustments or multiple exposures.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If double patterning technique is used to form finer patterns, then pattern resolution is improved, but manufacturing cost increases

Engineering Contradiction:
Improvepattern resolutionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent changes material parameters by using mandrel materials and sidewall materials with different etch selectivities. This allows selective removal of the mandrel while preserving the sidewall structures, enabling pattern formation without requiring expensive multiple exposure equipment. The parameter changes in material properties simplify the manufacturing process and reduce costs.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the optical exposure system with a self-aligned structural formation approach. Instead of using complex optical alignment systems for multiple exposures, the method uses physical self-alignment through sidewall deposition on mandrels. This substitution eliminates the need for expensive multi-exposure equipment while achieving comparable or superior pattern resolution.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Manufacturing precision

If multiple exposure processes are performed to form a mask, then pattern fineness is improved, but alignment accuracy deteriorates

Engineering Contradiction:
Improvepattern finenessVSAvoidalignment accuracy
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

The patent employs self-alignment mechanisms where the sidewall structures automatically align to the mandrel pattern through conformal deposition. The mandrel itself serves as the alignment reference for subsequent steps, eliminating the need for separate alignment operations. This self-service approach ensures high alignment accuracy while forming fine patterns, as the geometric relationship is physically determined rather than optically aligned.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method simplifies the semiconductor device manufacturing process, reduces costs, and allows for the accurate formation of microscopic patterns finer than the exposure limit by eliminating the need for a second exposure process and improving alignment accuracy.

Implementation Method 1

a first pattern forming process for forming a first pattern by patterning a first mask material layer made of a photoresist

Methodology Applied
Scientific EffectPhotopolymerization: Photopolymerisation

Implementation Method 2

a boundary layer etching process for exposing the first pattern and forming a second pattern having the second mask material layer at a top portion thereof by etching the boundary layer

Methodology Applied
Scientific EffectChemical etching: Chemical Bonding

Data Source

PatentUS8283253B2Pattern forming method, semiconductor device manufacturing method and semiconductor device manufacturing apparatus
Publication Date: 2012.10.09 TOKYO ELECTRON LTD
  • US8283253B2 patent drawing
  • US8283253B2 patent drawing
  • US8283253B2 patent drawing

AI summary

A pattern forming method for forming a pattern serving as a mask, includes a process for forming a first pattern 105, a process for trimming a width of the first pattern 105, a process for forming a boundary layer 106 on a surface of the first pattern 105, a process for forming a second mask material layer 107 on a surface of the boundary layer 106, a process for removing a part of the second mask material layer 107 to expose top portions of the boundary layer 106, and a process for exposing the first pattern 105 and forming a second pattern having the second mask material layer 107 at a top portion thereof by etching the boundary layer 106.