Ferroelectric Gate Transistor Matrix for Write Disturb Suppression
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Solution Overview
Problem
The existing semiconductor storage elements, particularly those using a 1T-type structure with ferroelectric material, face challenges in preventing 'Write Disturb' and deterioration of the gate insulator film, leading to unreliable information storage due to voltage application to unselected storage elements during writing operations.
Innovation Solution
The semiconductor storage element design includes a matrix arrangement of transistors, where a first transistor with a ferroelectric gate insulator is connected to a second and third transistor, allowing selective application of an external electric field to the gate of the first transistor, thereby preventing voltage application to unselected elements and reducing ferroelectric film degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If voltage is applied to write information into a selected storage element in a 1T-type FeRAM, then information can be stored in the selected element, but voltage is also applied to unselected storage elements sharing the same word lines and bit lines, causing Write Disturb and potential information rewriting
Solution Approach 1:
The patent segments the word lines into multiple groups (first word lines and second word lines) that are independently controllable. By applying different voltages to different groups of word lines, the patent can selectively apply write voltage only to the specific group containing the selected storage element, while keeping other groups at lower voltages to prevent Write Disturb. This segmentation resolves the contradiction by enabling both efficient writing and reliable storage protection.
Solution Approach 2:
The patent implements local quality control by applying different voltage levels to different regions (groups of word lines) based on their selection status. The selected group receives high voltage for writing, while unselected groups receive low voltage to prevent disturbance. This localized voltage control allows the system to maintain high writing efficiency while ensuring data reliability in unselected regions.
2Reliability
If voltage is repeatedly applied to suppress Write Disturb in unselected storage elements, then information reliability may be maintained, but the gate insulator film formed by ferroelectric material deteriorates, declining reliability of stored information
Solution Approach 1:
The patent applies partial action by selectively suppressing voltage only to the extent necessary for each unselected group. Instead of uniformly applying high suppression voltage to all unselected elements, the patent divides them into groups and applies appropriate voltage levels only to those groups that need protection, minimizing unnecessary stress on the ferroelectric gate insulator film while still preventing Write Disturb where needed.
3Reliability
If individually controlling voltage to word lines and bit lines of selected and unselected storage elements is implemented, then Write Disturb can be suppressed, but device complexity increases
Solution Approach 1:
The patent merges the control of multiple individual word lines into grouped control structures (first word lines and second word lines) that can be controlled collectively. This merging reduces the complexity of individual line control while maintaining the ability to selectively address different regions. The grouped approach simplifies the control architecture compared to individually controlling each word line, thereby reducing device complexity while still achieving reliable Write Disturb suppression.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability of stored information by preventing 'Write Disturb' and minimizing the deterioration of the ferroelectric gate insulator film, ensuring accurate and durable data storage.
Implementation Method 1
a gate insulator film at least partially formed by ferroelectric material... stores information in a direction of residual polarization of the ferroelectric that can control a direction of polarization depending on an external electric field
Data Source
AI summary
A semiconductor storage element includes a first transistor including a gate insulator film at least partially formed by a ferroelectric material, a second transistor connecting with a gate of the first transistor at one of a source or a drain, and a third transistor connecting with a drain of the first transistor at one of a source or a drain. The semiconductor storage element is arranged in a matrix, and each of the second and third transistors connects with a word line at a gate and connects with a bit line at another one of the source or the drain.