Image Sensor Fill-Factor via Embedded Photo-Diodes

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Solution Overview

Problem

Conventional CMOS image sensors have a low fill-factor due to photo diodes and transistors being fabricated on the same silicon substrate, leading to decreased signal-to-noise ratio and limited interconnection layers, which restricts light transmission and increases crosstalk between pixels.

Innovation Solution

The image sensor embeds isolated photo-diodes in the interconnection layer above semiconductor devices, allowing for increased fill-factor and integration of digital and analog signal processing circuitry without affecting photo response, using a stacked interlayer structure with reflective conductive films and dual damascene contact openings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If photo diodes and transistors are fabricated on the same silicon substrate, then device integration is achieved, but fill-factor decreases

Engineering Contradiction:
Improvedevice integrationVSAvoidfill-factor
Core Design Contradiction:
Device complexityVSArea of moving object

Solution Approach 1:

The patent moves photo diodes from the substrate plane to the vertical dimension by embedding them in the interconnection layer above the substrate. This dimensional transition allows photo diodes to occupy vertical space rather than horizontal substrate area, enabling both high device integration on the substrate and high fill-factor for photo diodes without mutual interference.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Object-affected harmful factors

If vertical distance between photo-diode and color filter array is reduced to suppress crosstalk, then crosstalk is reduced, but interconnection layer thickness is limited

Engineering Contradiction:
ImprovecrosstalkVSAvoidinterconnection layer thickness
Core Design Contradiction:
Object-affected harmful factorsVSLength of stationary object

Solution Approach 1:

The patent segments the crosstalk suppression function across multiple interconnection layers. Instead of relying on a single thick layer, the solution uses several thinner interconnection layers stacked vertically, each contributing to optical isolation. This segmentation allows achieving sufficient crosstalk suppression while maintaining flexibility in interconnection layer design and thickness.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If more metal layers are used for interconnection, then circuit integration capability is improved, but light transmission is blocked

Engineering Contradiction:
Improvecircuit integration capabilityVSAvoidlight transmission
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by making interconnection layers selectively transparent. The interconnection layers are designed with specific optical properties that allow light transmission in the spectral regions where photo diodes are sensitive, while still providing electrical interconnection functionality. This localized optimization of optical transparency enables both high circuit integration and efficient light transmission.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the fill-factor to over 80% and reduces crosstalk, enabling efficient light transmission and integration of complex circuitry without thickness or metal layer limitations, improving signal-to-noise ratio and photo sensitivity.

Implementation Method 1

The interconnection layer includes a plurality of reflective conductive films stacked on the substrate alternately with insulating films

Methodology Applied
Scientific EffectReflection: Reflection

Data Source

PatentUS7833817B2Fabricating method of image sensor
Publication Date: 2010.11.16 HEJIAN TECH SUZHOU
  • US7833817B2 patent drawing
  • US7833817B2 patent drawing
  • US7833817B2 patent drawing

AI summary

A method for fabricating an image sensor includes following steps. First, a substrate having semiconductor devices formed thereon is provided. Interlayer insulating films and Interlayer conductive films are formed on the substrate alternately, wherein the interlayer conductive films are electrically connected to the semiconductor devices. Next, isolated photo-diodes are formed on a topmost layer of the interlayer conductive films, wherein one electrode of the isolated photo-diodes is electrically connected to a topmost layer of the interlayer conductive films. A top insulating layer is formed on the topmost layer of the interlayer conductive films, wherein the isolated photo-diodes are covered by the top insulating layer. A top conductive layer is formed in the top insulating layer, wherein the top conductive layer is electrically connected to another electrode of the isolated photo-diodes.