Semiconductor Sidewall Insulating Layer for Short-Channel Effect Suppression
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Solution Overview
Problem
Miniaturization of transistors leads to defects such as breakage and connection failures due to reduced coverage, and the short-channel effect, which results in degradation of electrical characteristics like increased leakage current and decreased threshold voltage, particularly in oxide semiconductor transistors with low carrier density.
Innovation Solution
A semiconductor device design featuring an oxide semiconductor layer with a source or drain electrode comprising a stacked conductive layer structure and a sidewall insulating layer made of multiple material layers, including nitride and oxide insulating layers, to enhance coverage and create a high-resistance region near the channel formation area, reducing the electric field and suppressing short-channel effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistor size is reduced to achieve miniaturization, then productivity and device density increase, but manufacturing precision deteriorates due to breakage and connection failures
Solution Approach 1:
The source or drain electrode is divided into a stacked structure with multiple conductive layers (first conductive layer and second conductive layer). This segmentation allows each layer to perform specific functions: the first layer provides electrical connection while the second layer extends beyond the gate electrode to form a high-resistance region, thereby improving connection reliability without increasing overall device size.
Solution Approach 2:
The second conductive layer extends in the channel length direction beyond the end portion of the first conductive layer, utilizing the dimensional space above the gate electrode. This dimensional extension creates a high-resistance region that suppresses short-channel effects without increasing the lateral footprint of the transistor, thus maintaining high device density while improving electrical characteristics.
2Productivity
If transistor size is reduced to achieve miniaturization, then productivity increases, but reliability deteriorates due to short-channel effects and defects
Solution Approach 1:
The electrode structure implements local quality by creating different electrical properties in different regions: the first conductive layer region provides low-resistance connection, while the second conductive layer region extending beyond the gate forms a high-resistance region. This local differentiation suppresses short-channel effects and improves electrical characteristics without compromising overall device performance.
Solution Approach 2:
The source or drain electrode uses a composite structure of multiple conductive layers with different electrical properties. This composite material approach allows optimization of both connection reliability and electrical characteristics by combining materials that provide different resistance characteristics in specific regions.
3Use of energy by moving object
If oxide semiconductor is used in channel formation region, then low power consumption is achieved, but short-channel effects worsen due to low carrier density
Solution Approach 1:
The electrode structure creates local quality differences with high-resistance regions positioned specifically near the channel formation area. This localized high-resistance region suppresses short-channel effects without affecting the low power consumption characteristics of the oxide semiconductor channel, as the power consumption benefit is maintained through the oxide semiconductor's inherent low carrier density.
Data Source
AI summary
A semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode, in which the source electrode or the drain electrode comprises a first conductive layer and a second conductive layer having a region which extends beyond an end portion of the first conductive layer in a channel length direction and which overlaps with part of the gate electrode, in which a sidewall insulating layer is provided over the extended region of the second conductive layer, and in which the sidewall insulating layer comprises a stack of a plurality of different material layers.