Array Substrate Fabrication Using Reserved Photoresist

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Solution Overview

Problem

The complex array substrate fabrication process for liquid crystal display devices using metal oxide thin film transistors requires additional etch stop layers, increasing the number of fabrication steps and process complexity due to the similar etching properties of metal oxide and Indium tin oxide, which can damage the pixel electrode during processing.

Innovation Solution

A method that reserves a photoresist layer on conductive areas of the active layer during the formation of thin film transistors, eliminating the need for an additional etch stop layer and simplifying the patterning process by using photoetching technology to form patterns without additional photoresist stripping steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an etch stop layer is formed to protect the active layer during source and drain fabrication, then the active layer is protected from damage, but the number of fabrication steps and process complexity increase

Engineering Contradiction:
Improveprotection of active layerVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The photoresist layer is retained on the active layer after patterning instead of being removed, serving as a preliminary protective measure for subsequent fabrication steps. This preliminary action eliminates the need for a separate etch stop layer and reduces process complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The photoresist layer performs multiple functions: it serves as a pattern definition material during active layer formation and simultaneously acts as a protective layer during source and drain fabrication. This multi-functionality eliminates the need for separate protection layers

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If an additional patterning step is added to form the etch stop layer, then the active layer is protected, but the fabricating steps increase from conventional levels

Engineering Contradiction:
Improveprotection of active layerVSAvoidfabrication efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The protective function is merged into the existing photoresist layer that is already present on the active layer. By combining the pattern definition function and protection function in a single layer, the need for additional patterning steps is eliminated, improving fabrication efficiency

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If the photoresist layer is stripped after active layer formation, then the process follows conventional steps, but the active layer loses protection during subsequent processing

Engineering Contradiction:
Improveconventional process flowVSAvoidprotection of active layer
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The photoresist layer is retained as a preliminary protective measure before source and drain fabrication begins. This maintains protection throughout the fabrication process while still allowing conventional process flows to be used

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the complexity of the array substrate fabrication process by eliminating the need for an additional patterning step and etch stop layer formation, thereby simplifying the process while protecting the active layer during subsequent processing steps.

Implementation Method 1

forming a pattern of an active layer comprising thin film transistors by using the semiconductor material layer and the first photoresist layer through photoetching technology

Methodology Applied
Scientific EffectPhotoetching: Photopolymerisation

Data Source

PatentUS9741751B2Array substrate fabricating method
Publication Date: 2017.08.22 BOE TECHNOLOGY GROUP CO LTD
  • US9741751B2 patent drawing
  • US9741751B2 patent drawing
  • US9741751B2 patent drawing

AI summary

The present invention provides an array substrate fabricating method. The array substrate fabricating method comprises the steps of: forming a semiconductor material layer and a first photoresist layer on a substrate successively, forming a pattern of an active layer comprising thin film transistors by using the semiconductor material layer and the first photoresist layer through photoetching technology, and reserving the first photoresist layer at least on conductive areas of the active layer when the thin film transistors are turned on; and forming a first material layer on the substrate on which the active layer is formed and the first photoresist layer is reserved on the active layer, and forming a pattern comprising first structures by using the first material layer through the photoetching technology. The method is adapted for fabricating an array substrate using metal oxide thin film transistors.