Array Substrate Polysilicon Metal Oxide Compatibility
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Solution Overview
Problem
The manufacturing processes for low-temperature polysilicon and metal oxide thin film transistors have poor processing compatibility, making it difficult to combine their advantages in display devices, which results in instability and poor user experience.
Innovation Solution
A method for manufacturing an array substrate involving sequential formation of semiconductor patterns and insulating layers, with specific pre-processing steps and annealing to ensure compatibility, including forming via holes, connecting wires, and electrodes, while using polysilicon and metal oxide materials with different properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If manufacturing processes for low-temperature polysilicon and metal oxide thin film transistors are combined, then the display device can achieve high mobility, fast charging, and low leakage current, but the processing compatibility is poor and process stability deteriorates
Solution Approach 1:
The array substrate is divided into first and second regions with different semiconductor patterns (polysilicon in first region, metal oxide in second region). This segmentation allows each region to be optimized for its specific material requirements while being manufactured together, resolving the processing compatibility issue while maintaining process stability.
Solution Approach 2:
Different semiconductor materials are used in different regions of the array substrate according to local requirements. The first region uses polysilicon for high mobility and fast charging, while the second region uses metal oxide for low leakage current. This local differentiation enables optimal performance in each region while maintaining overall process stability.
2Reliability
If different semiconductor materials (polysilicon and metal oxide) are used in the same array substrate, then the user experience is significantly improved, but the manufacturing complexity increases
Solution Approach 1:
The array substrate is segmented into distinct first and second regions with different semiconductor patterns. This segmentation strategy allows different materials to be processed simultaneously using standardized工艺流程, reducing manufacturing complexity while delivering enhanced user experience through combined material advantages.
Solution Approach 2:
The manufacturing process is designed to handle multiple semiconductor materials universally through a single standardized工艺流程. By making the process multi-functional to accommodate both polysilicon and metal oxide, the manufacturing complexity is reduced compared to separate processes, while still achieving superior user experience.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances processing compatibility and stability, ensuring reliable connection performance and improving user experience by addressing the compatibility issues between polysilicon and metal oxide thin film transistors.
Implementation Method 1
annealing the exposed first semiconductor pattern
Data Source
AI summary
A method of manufacturing an array substrate includes: forming a first semiconductor pattern and a first insulating layer group sequentially on a base substrate; forming a second semiconductor pattern and a second insulating layer group sequentially on the first insulating layer group; forming two first via holes in the first insulating layer group and the second insulating layer group to expose the first semiconductor pattern, annealing the exposed first semiconductor pattern and then removing an oxide layer on a surface of the first semiconductor pattern; forming connecting wires in the first via holes; forming second via holes in the second insulating layer group to expose the second semiconductor pattern, and forming a first source electrode and a first drain electrode in the second via holes such that the first source electrode or the first drain electrode covers and is connected to one of the connecting wires.


