Array Substrate Recessed Electrodes Capacitance High Resolution
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Solution Overview
Problem
As display panel resolution increases, the area occupied by each sub-pixel decreases, leading to a reduction in capacitor structure capacitance, which is challenging to maintain without compromising manufacturing efficiency or display quality.
Innovation Solution
The array substrate design includes a capacitor structure with recessed electrodes and a dielectric layer, where the electrodes form recesses that increase their opposing surface area, and the insulating layer has recesses that align with the electrodes, enhancing capacitance without requiring high-temperature processing or reducing the dielectric layer thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the display panel resolution is increased, then the display quality is improved, but the area occupied by each sub-pixel decreases, resulting in reduced capacitor structure capacitance
Solution Approach 1:
The patent introduces a vertical dimension to the capacitor structure by forming recesses in the electrodes. Instead of only increasing capacitance through lateral area expansion in the planar dimension, the electrode recesses create additional opposing surfaces in the vertical direction, effectively utilizing three-dimensional space to maintain capacitance despite reduced sub-pixel area.
Solution Approach 2:
The capacitor structure is nested within the sub-pixel structure, with the first and second electrodes forming recesses that contain dielectric layers. The insulating layer with recesses is positioned between the base substrate and the first electrode, creating a nested arrangement where capacitor elements are integrated within the limited sub-pixel volume without protruding outward.
2Quantity of substance
If the dielectric layer thickness is reduced to increase capacitance, then the capacitor capacitance is improved, but the manufacturing complexity and quality control difficulty increase
Solution Approach 1:
Instead of relying on reducing dielectric layer thickness to increase capacitance, the patent uses the vertical dimension through electrode recesses to create additional capacitance. The recesses form opposing electrode surfaces that face each other across the dielectric layer, generating capacitance without requiring extremely thin dielectric films, thus avoiding the manufacturing complexity and quality control issues associated with thin-film deposition.
3Ease of manufacture
If high-temperature processing is used to manufacture the capacitor structure, then the manufacturing process is simplified, but the existing manufacturing methods cannot be used and process changes are required
Solution Approach 1:
The patent changes the geometric parameters of the electrode structures by forming recesses with specific depth and width ratios. The depth of the recesses is controlled to be between 0.5 to 2 times the width of the electrodes, creating optimal capacitance while maintaining compatibility with existing low-temperature manufacturing processes. This parameter optimization allows standard semiconductor fabrication techniques to be used without high-temperature processing.
Solution Approach 2:
The insulating layer with recesses is formed beforehand before depositing the electrode and dielectric layers. This preliminary structuring of the insulating layer provides a template that guides subsequent material deposition, ensuring proper alignment and integration of the capacitor structure within the sub-pixel without requiring high-temperature processing steps.
Data Source
AI summary
An array substrate, a manufacturing method thereof, a display panel and an electronic device are disclosed. The array substrate includes: a base substrate, a first electrode and a second electrode. The first electrode is disposed on the base substrate; the second electrode is disposed on the first electrode and is at least partly opposite to the first electrode in a direction perpendicular to the base substrate; the first electrode and the second electrode are electrically insulated from each other; a capacitor structure is constituted by a region of the first electrode and a region of the second electrode which are opposite to each other; and the capacitor structure includes a portion which forms at least part of a first recess.