Array Substrate Repairing Line for Gate Line Disconnection

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Solution Overview

Problem

Conventional TFT-LCD array substrates face issues with gate line disconnections during manufacturing, which cannot be repaired after the insulation layer is deposited, leading to defective substrates or poor display performance.

Innovation Solution

Incorporation of a repairing line with longitudinal and transverse portions in the array substrate's second metal layer, allowing for electrical connection through the insulation layer to reconnect disconnected gate lines, utilizing conductive paths or through holes for repair.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If an insulation layer is deposited on gate lines after etching, then manufacturing process is completed, but gate line disconnection defects cannot be repaired

Engineering Contradiction:

Improvemanufacturing process completionVSAvoidgate line disconnection repair

Core Design Contradiction:

Ease of manufactureVSEase of repair

Solution Approach 1:

The patent introduces repairing lines in the second metal layer before the insulation layer is deposited. These repairing lines are positioned to intersect with gate lines in the first metal layer, creating pre-prepared conductive paths that enable future repair operations. This preliminary arrangement allows defect repair after the insulation layer is deposited, resolving the contradiction between completing manufacturing and enabling repairs.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If gate lines are covered with insulation layer, then substrate protection is improved, but defect detection and repair capability is lost

Engineering Contradiction:

Improvesubstrate protectionVSAvoiddefect detection and repair

Core Design Contradiction:

ReliabilityVSEase of repair

Solution Approach 1:

The patent uses the insulation layer as an intermediary barrier that is penetrated by through holes to create repair paths. The repairing lines in the second metal layer serve as intermediaries to reconnect disconnected gate lines. This allows the insulation layer to maintain its protective function while still enabling defect repair through controlled penetration points.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Productivity

If conventional etching process is used to form gate lines, then manufacturing efficiency is improved, but disconnection defects occur

Engineering Contradiction:

Improvemanufacturing efficiencyVSAvoidgate line continuity

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent prepares repairing lines in advance during the metal layer formation process, before any defects occur. This preliminary preparation allows rapid response to etching-induced disconnection defects without requiring rework of the entire gate line structure, thus maintaining high manufacturing efficiency while improving reliability.

Inventive Principle:

Principle #10Preliminary action

4Ease of repair

If repairing process is performed after insulation layer deposition, then defect repair is enabled, but additional manufacturing steps are required

Engineering Contradiction:

Improvegate line repair capabilityVSAvoidmanufacturing process steps

Core Design Contradiction:

Ease of repairVSDevice complexity

Solution Approach 1:

The patent incorporates repairing lines into the standard metal layer deposition sequence, so that repair capability is built-in during normal manufacturing. This eliminates the need for separate repair process steps after defect detection, as the repairing lines are already in place and ready for use.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables on-site repair of gate line disconnections without affecting the display, ensuring the array substrate's functionality and minimizing line resistance impact.

Implementation Method 1

an insulation layer provided between and for insulating the first metal layer and the second metal layer

Methodology Applied

Scientific EffectElectrical insulation: Electrical Resistance

Implementation Method 2

a repairing line provided in edge regions of the second metal layer and insulated from the plurality of the second signal lines, wherein the repairing line comprises a first longitudinal portion, a second longitudinal portion and a transverse portion, the first longitudinal portion is electrically connected to the second longitudinal portion by the transverse portion

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS9170462B2Array substrate and liquid crystal display panel

Publication Date: 2015.10.27 BEIJING BOE OPTOELECTRONCIS TECH CO LTD

AI summary

An array substrate comprises a first metal layer in which first signal lines are disposed; a second metal layer in which second signal lines are disposed; an insulation layer provided between the first and second metal layers. A repairing line is provided in edge regions of the second metal layer and insulated from the second signal lines, and the repairing line comprises a first longitudinal portion, a second longitudinal portion and a transverse portion, the first longitudinal portion is electrically connected to the second longitudinal portion by the transverse portion. A projection of the first longitudinal portion in a plane of the first metal layer intersects with one end of each of the first signal lines, and a projection of the second longitudinal portion in the plane of the first metal layer intersects with the other end of each of the first signal lines.