Array Substrate Storage Capacitor Vertical Stacking
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Solution Overview
Problem
Conventional array substrates for liquid crystal display (LCD) devices have a large distance between electrodes in storage capacitors, affecting capacitance and display results.
Innovation Solution
The array substrate design includes a storage capacitor electrode between the pixel electrode and the common electrode, with projections overlapping on the base substrate, and a color resist layer that reduces the distance between the storage capacitor and common electrodes, allowing for electrical connections through via holes, thereby increasing capacitance without increasing mask plate exposure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large distance is maintained between electrodes in storage capacitors, then the structural stability is improved, but the capacitance decreases
Solution Approach 1:
The patent transitions from a planar electrode arrangement to a three-dimensional stacked configuration. The storage capacitor electrode is positioned between the pixel electrode and common electrode in the vertical dimension, with projections overlapping on the base substrate. This vertical stacking enables capacitance enhancement through increased effective area without requiring larger lateral distances between electrodes.
Solution Approach 2:
The storage capacitor electrode is nested within the vertical space between the pixel electrode and common electrode. The overlapping projections create a nested configuration where the storage capacitor occupies the same lateral footprint as the pixel electrode, effectively utilizing the vertical dimension for capacitance enhancement without increasing lateral device area.
2Quantity of substance
If the distance between storage capacitor and common electrodes is reduced, then the capacitance is improved, but the manufacturing precision requirements increase
Solution Approach 1:
By moving the storage capacitor electrode into the vertical dimension between existing electrodes, the patent reduces lateral distance requirements while maintaining manufacturability. The overlapping projection design allows standard lithographic processes to define all electrodes simultaneously, reducing alignment precision requirements compared to sequential patterning approaches.
Solution Approach 2:
The patent combines the storage capacitor electrode formation with the existing pixel electrode and common electrode structure. All three electrodes are formed in the same fabrication process sequence, with their relative positions defined by a single lithographic step, thereby merging multiple functions into a unified manufacturing process that reduces precision requirements.
Data Source
AI summary
Array substrate and display panel, and their fabrication methods are provided. The array substrate includes a first base substrate; a pixel electrode over the first base substrate; a first common electrode between the first base substrate and the pixel electrode; and a storage capacitor electrode, between the pixel electrode and the first common electrode and coupled with one of the pixel electrode and the first common electrode. Projections of the first common electrode and the pixel electrode on the first base substrate at least partially overlap with each other.


