Array Substrate Storage Capacitor Line Parallel Scan Line
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Solution Overview
Problem
In thin film transistor liquid crystal displays (TFT-LCDs), the parallel disposition of storage capacitor lines with gate or common electrodes leads to crosstalk effects due to parasitic capacitance, resulting in kickback voltages that cause frame flickers.
Innovation Solution
The array substrate design includes a storage capacitor line that extends parallel to the scan line, overlapping with the pixel electrode, which reduces parasitic capacitance and kickback voltage by increasing storage capacitance, thereby minimizing frame flickers during gray-scale changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the storage capacitor line is disposed in parallel to the data line, then the crosstalk effect is reduced, but parasitic capacitance generates kickback voltage causing frame flickers
Solution Approach 1:
The storage capacitor line is extended in a new direction (parallel to scan line) to create an additional capacitance path, transforming the single-capacitance configuration into a multi-dimensional capacitance network that simultaneously addresses both crosstalk and kickback voltage issues
Solution Approach 2:
The capacitance value is increased by adding the extending portion parallel to the scan line, changing the electrical parameter of storage capacitance to sufficiently suppress kickback voltage while maintaining the parallel disposition that reduces crosstalk
2Reliability
If the storage capacitor line is extended parallel to the scan line overlapping the pixel electrode, then storage capacitance is increased to reduce kickback voltage, but the layout complexity increases
Solution Approach 1:
The storage capacitor line serves multiple functions: it maintains storage capacitance for the pixel, reduces parasitic capacitance effects, and its extending portion overlapping the pixel electrode provides additional capacitance to suppress kickback voltage, making a single structure perform multiple beneficial roles
Solution Approach 2:
The storage capacitor line is merged with the pixel electrode structure by having the extending portion overlap the pixel electrode, combining two elements that work together to suppress kickback voltage while maintaining a relatively compact layout
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces frame flickers by mitigating the impact of parasitic capacitance on the pixel electrode, enhancing display stability and image quality.
Implementation Method 1
a kickback voltage (ΔVp) toward the pixel electrode 15 is generated by the scan line 12 due to a parasitic capacitance
Implementation Method 2
a storage capacitor (Cs) is required to connect with the TFT of the pixel in parallel so as to increase the capacitance maintaining the electricity
Data Source
AI summary
An array substrate is disclosed. The array substrate comprises a substrate, a gate metal layer, a gate insulation layer, a semiconductor layer, a patterned metal layer, a flat layer, and a pixel electrode. The patterned metal layer is disposed on the surface of the semiconductor layer comprising a source and a drain, and on the surface of the gate insulation layer comprising a storage capacitor line and a data line. The storage capacitor line has an extending portion parallel to a scan line. The pixel electrode overlaps parts of the scan line, parts of the data line, parts of the storage capacitor line, and parts of the extending portion. A method for manufacturing the array substrate is also provided.