Array Substrate Storage Capacitor Vertical Stacking
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Solution Overview
Problem
Conventional array substrates for liquid crystal display (LCD) devices with storage capacitors have a large distance between electrodes, affecting capacitance and display results.
Innovation Solution
The array substrate design includes a storage capacitor electrode between the pixel electrode and the common electrode, with projections overlapping on the base substrate, and a color resist layer with sub-color resists, allowing for electrical connections through via holes, reducing the distance between capacitor components and increasing capacitance without increasing mask plate exposure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a large distance is used between storage capacitor electrodes, then the physical layout is simpler, but the capacitance decreases affecting display results
Solution Approach 1:
The patent transitions from a planar layout to a three-dimensional stacked architecture. The storage capacitor electrodes are arranged in multiple layers vertically, with first and second storage capacitor electrodes positioned at different heights above the substrate. This vertical stacking enables capacitance enhancement without increasing lateral footprint, resolving the contradiction between layout simplicity and capacitance requirement.
Solution Approach 2:
The storage capacitor structure is nested within the pixel electrode assembly. The first storage capacitor electrode is positioned between the substrate and the pixel electrode, while the second storage capacitor electrode is positioned above the pixel electrode. This nested arrangement allows multiple capacitor elements to occupy overlapping lateral spaces at different vertical levels, maximizing capacitance within the available volume.
2Reliability
If additional mask plate exposures are used to form storage capacitor electrodes, then capacitance can be increased, but manufacturing complexity and cost increase
Solution Approach 1:
The patent merges the formation of storage capacitor electrodes with the existing pixel electrode fabrication process. The first storage capacitor electrode is formed simultaneously with the pixel electrode in the same patterning step, and the second storage capacitor electrode is formed during the same process sequence. This integration eliminates the need for separate mask plate exposures dedicated solely to storage capacitor formation, reducing manufacturing complexity while achieving enhanced capacitance.
Solution Approach 2:
The patterning processes used for forming pixel electrodes are made multi-functional by simultaneously defining both pixel electrode regions and storage capacitor electrode regions. The same mask patterns and deposition steps serve dual purposes: creating the pixel electrode structure and establishing the storage capacitor electrode positions. This universal approach reduces the total number of fabrication steps required.
Data Source
AI summary
Array substrate and display panel, and their fabrication methods are provided. The array substrate includes a first base substrate; a pixel electrode over the first base substrate; a first common electrode between the first base substrate and the pixel electrode; and a storage capacitor electrode, between the pixel electrode and the first common electrode and coupled with one of the pixel electrode and the first common electrode. Projections of the first common electrode and the pixel electrode on the first base substrate at least partially overlap with each other.