Array Substrate Light-Shielding Structure for 3T1C TFT Isolation
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Solution Overview
Problem
In display panels with a 3T1C driving architecture, traditional light-shielding layers under thin film transistors can cause short circuits due to direct metal wiring connections between light-shielding layers and other signal wirings.
Innovation Solution
The implementation of an array substrate with conductive thin film layers that directly connect and shield light-shielding layers, preventing short circuits by eliminating the need for metal wiring connections between light-shielding layers and other signal wirings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal wirings are used to connect light-shielding layers to prevent threshold voltage shift, then the stability of thin film transistors is improved, but the risk of short-circuit with signal wirings increases
Solution Approach 1:
The patent transitions from planar metal wiring connections to vertical stacking architecture. Light-shielding layers are stacked in multiple layers with conductive bridges connecting them vertically, moving the connection dimension from horizontal (metal wiring) to vertical (stacked layers), thereby eliminating short-circuit risks with signal wirings while maintaining electrical connection for stability
Solution Approach 2:
The patent introduces conductive bridges as intermediary elements to connect light-shielding layers across different stacking layers. These conductive bridges serve as mediators that provide electrical connection without requiring metal wirings that could short-circuit with signal wirings, thus maintaining transistor stability while avoiding harmful short-circuits
2Reliability
If multiple metal wirings are added to connect light-shielding layers, then the electrical connection is improved, but the device complexity increases
Solution Approach 1:
The patent merges multiple light-shielding layers into a stacked architecture where conductive bridges provide electrical connection between layers. This consolidation approach replaces multiple separate metal wiring connections with an integrated stacking structure, reducing overall device complexity while maintaining electrical connectivity
Solution Approach 2:
The patent resolves the complexity issue by moving from horizontal metal wiring connections to vertical stacking with conductive bridges. This dimensional change eliminates the need for multiple metal wirings to traverse the substrate, simplifying the overall device structure while achieving the required electrical connections
Data Source
AI summary
An array substrate, a method of manufacturing the same, and a display panel are provided. The array substrate includes a substrate, a conductive thin film layer, a first light-shielding layer, a second light-shielding layer, a third light-shielding layer, and an array device layer, wherein orthographic projection areas of the first light-shielding layer and second light-shielding layer on the substrate are positioned in an orthographic projection area of the conductive thin film layer on the substrate, wherein a pixel unit of the array device layer includes a first thin film transistor, a second thin film transistor, and a third thin film transistor. The first light-shielding layer is positioned between the substrate and the first thin film transistor, the second light-shielding layer is positioned between the substrate and the second thin film transistor, and the third light-shielding layer is positioned between the substrate and the third thin film transistor.