ASIC Busbar Layout with Remote Power Phases for Shorter Signal Paths
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Solution Overview
Problem
Existing telecommunications and networking shelf and circuit card assemblies face challenges in reducing signal track length and power consumption due to the arrangement of power phases surrounding the integrated circuit chip, which limits the proximity of QSFP-DD/OSFP connectors to the ASIC, leading to increased power consumption and signal loss.
Innovation Solution
The solution involves grouping power phases away from the sides of the integrated circuit chip and using busbars to communicatively couple them to the chip, allowing for a more efficient layout that reduces signal track length and power consumption by positioning QSFP-DD/OSFP connectors closer to the ASIC.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If power phases are arranged surrounding the integrated circuit chip, then the power delivery is simplified, but the signal track length increases and power consumption increases
Solution Approach 1:
The power phases are extracted from the traditional surrounding arrangement and relocated to a distant grouped configuration. The busbar serves as the extraction mechanism to deliver power from the removed power phases to the ASIC, enabling both simplified power delivery architecture and reduced signal track lengths for high-speed interfaces.
Solution Approach 2:
The busbar acts as an intermediary component that bridges the gap between the remotely grouped power phases and the ASIC. This mediator enables power delivery without requiring the power phases to be physically adjacent to the chip, thus resolving the contradiction between simplified power delivery and reduced signal track length.
2Device complexity
If power phases are arranged surrounding the integrated circuit chip, then power delivery is simplified, but the signal track length increases leading to signal loss
Solution Approach 1:
Power phases are extracted from the surrounding arrangement and relocated to a distant grouped configuration, eliminating the interference between power phases and high-speed signal paths while maintaining simplified power delivery through the busbar intermediary.
Solution Approach 2:
The layout transitions from a two-dimensional surrounding arrangement to a three-dimensional configuration where power phases are grouped at a distance and connected via busbar, creating spatial separation that improves signal quality while maintaining power delivery functionality.
3Temperature
If QSFP-DD/OSFP connectors are positioned farther from the ASIC, then cooling airflow is improved, but power consumption increases due to longer track lengths
Solution Approach 1:
The power delivery function is extracted from the traditional layout and reimagined through distant grouped power phases connected by busbar, enabling flexible connector positioning for optimal cooling while maintaining short effective signal paths through the busbar intermediary.
Data Source
AI summary
A circuit assembly includes a printed circuit board, an integrated circuit chip coupled to the printed circuit board, and a plurality of power phases associated with the integrated circuit chip arranged as grouped power phases. One or more power phases of the grouped power phases is physically distanced from a side of the integrated circuit chip associated with physically distanced power phase(s) of the grouped power phases.