Aspect Ratio Trapping in Non-Planar Semiconductor Devices
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Solution Overview
Problem
As integrated circuit components decrease in size, current leakage across transistors becomes a prevalent issue due to defects in the device, which existing non-planar architectures like trigates and finFETs struggle to address effectively.
Innovation Solution
The implementation of aspect ratio trapping (ART) in semiconductor devices, where the oxide layer is engineered to have a specific aspect ratio to trap defects at the interface between materials, minimizing their dispersion and thereby reducing current leakage by confining them to non-conductive regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If non-planar architectures (trigates, finFETs) are used to maintain scaling, then component size is reduced, but current leakage increases due to defects at material interfaces
Solution Approach 1:
An oxide layer is introduced as an intermediary between the semiconductor layer and the bulk substrate. This oxide layer serves as a defect-trapping intermediary that prevents defects from propagating to the semiconductor-oxide interface, thereby reducing current leakage while maintaining the scaled-down non-planar architecture
Solution Approach 2:
The invention converts the harmful effect of defects at material interfaces into a beneficial outcome by using aspect ratio trapping. The oxide layer's specific aspect ratio causes defects to be trapped and confined within the oxide layer itself, transforming what would be leakage pathways into contained defects that do not affect device performance
2Reliability
If oxide layer thickness is increased to reduce defects, then current leakage decreases, but device area increases
Solution Approach 1:
The invention changes the aspect ratio parameter of the oxide layer (the ratio of thickness to lateral dimensions) to optimize defect trapping. By carefully controlling this aspect ratio, the oxide layer effectively traps defects without requiring excessive thickness, thus maintaining small device area while achieving low current leakage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
ART effectively minimizes current leakage by restricting defects to the lower portion of the epitaxially grown lattice, enhancing the reliability of non-planar semiconductor devices by reducing electron flow irregularities.
Implementation Method 1
an oxide layer formed by epitaxy on the bulk substrate, between the isolation pillars
Data Source
AI summary
As disclosed herein, a semiconductor device with aspect ratio trapping is provided, including a bulk substrate, a plurality of isolation pillars formed on the bulk substrate, wherein one or more gaps are formed between the isolation pillars, an oxide layer formed by epitaxy on the bulk substrate, between the isolation pillars, wherein the oxide layer partially fills the gaps between the isolation pillars, one or more fins formed over the oxide layer between the isolation pillars, such that the one or more fins fill the gaps between the isolation pillars, wherein the oxide layer electrically isolates the one or more fins from the bulk substrate. The oxide layer has an aspect ratio that is selected to substantially eliminate defects at the interface between the oxide layer and the fins. The semiconductor device may also include a semiconductor layer between the bulk substrate and oxide layer.