Assembled Packaging Substrate Layout for Higher Yield

Solution Overview

Problem

Existing multichip packaging structures face high fabrication costs and low yield for large-sized packaging substrates, making them non-competitive in the market.

Innovation Solution

A substrate design featuring circuit members spaced apart with a circuit portion stacked and electrically connected, using conductive bodies, and encapsulated in a layer, allowing for increased layout area and reduced fabrication costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a large-sized packaging substrate is used to accommodate multiple circuit members, then the layout area is increased, but the fabrication cost increases and yield decreases

Engineering Contradiction:

Improvelayout areaVSAvoidfabrication cost

Core Design Contradiction:

Area of stationary objectVSEase of manufacture

Solution Approach 1:

The packaging substrate is divided into multiple smaller substrate portions, each accommodating one or more circuit members. These substrate portions are then assembled together to form the complete packaging substrate. This segmentation allows each smaller substrate to be fabricated independently with standard processes, avoiding the high cost and low yield associated with fabricating one large substrate, while the assembled structure provides the required large layout area.

Inventive Principle:

Principle #1Segmentation

2Area of stationary object

If a large-sized packaging substrate is used to accommodate multiple circuit members, then the layout area is increased, but the manufacturing yield decreases

Engineering Contradiction:

Improvelayout areaVSAvoidmanufacturing yield

Core Design Contradiction:

Area of stationary objectVSProductivity

Solution Approach 1:

The packaging substrate is divided into multiple smaller substrate portions, each accommodating one or more circuit members. These substrate portions are then assembled together to form the complete packaging substrate. This segmentation allows each smaller substrate to be fabricated independently with standard processes, avoiding the high cost and low yield associated with fabricating one large substrate, while the assembled structure provides the required large layout area.

Inventive Principle:

Principle #1Segmentation

3Area of stationary object

If circuit members are placed close together to maximize layout area, then the area utilization is improved, but the signal interference and crosstalk increase

Engineering Contradiction:

Improvearea utilizationVSAvoidsignal interference

Core Design Contradiction:

Area of stationary objectVSObject-generated harmful factors

Solution Approach 1:

The packaging substrate is divided into multiple smaller substrate portions, each accommodating one or more circuit members. These substrate portions are then assembled together to form the complete packaging substrate. This segmentation allows each smaller substrate to be fabricated independently with standard processes, avoiding the high cost and low yield associated with fabricating one large substrate, while the assembled structure provides the required large layout area.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS12114427B2Method for fabricating assemble substrate

Publication Date: 2024.10.08 SILICONWARE PRECISION IND CO LTD

AI summary

A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.