Context Aware Assertion Synthesis for FSM Size Reduction
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Solution Overview
Problem
Current techniques for synthesizing IEEE 1850 PSL and IEEE 1800 SVA assertions into finite state machines are inefficient due to increased complexity from sequences and local variables, leading to performance degradation in formal verification and simulation as the size of finite state machines grows.
Innovation Solution
The method involves converting assertion formulas into a nested sequence implication form using semantic preserving rewrite rules, optimizing the resulting formulas, and synthesizing them into non-deterministic or deterministic finite state machines, reducing the number of states and improving verification performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional assertion synthesis techniques are used to convert PSL and SVA assertions into finite state machines, then the assertions can be verified, but the size of the finite state machines increases exponentially, leading to performance degradation in formal verification and simulation
Solution Approach 1:
The patent segments the assertion synthesis process into distinct phases: conversion to nested sequence implication form, optimization of the converted formula, and synthesis to finite state machine. This segmentation allows each phase to be optimized independently, preventing exponential growth in FSM size while maintaining verification correctness.
Solution Approach 2:
The patent applies preliminary optimization actions by converting assertions to nested sequence implication form before synthesis and applying optimization rules at this intermediate stage. This preliminary action simplifies the structure before FSM generation, reducing the eventual FSM size while preserving the assertion's verification capability.
2Productivity
If the size of finite state machines is reduced through optimization, then verification performance improves, but the complexity of the synthesis process increases due to the need for context-aware transformations and optimizations
Solution Approach 1:
The patent changes the parameter representation of assertions by transforming them into nested sequence implication form with specific structural parameters (sequence implications, contexts). This parameter transformation enables systematic optimization while managing synthesis complexity through structured rules rather than brute-force approaches.
Solution Approach 2:
The nested sequence implication form serves as an intermediary representation between the original PSL/SVA assertions and the final finite state machine. This intermediary form allows optimizations to be applied in a controlled manner, balancing verification performance improvement with manageable synthesis process complexity.
3Productivity
If non-deterministic finite state machines are used to reduce FSM size, then verification efficiency improves, but the ease of operation and tool compatibility decreases compared to deterministic FSMs
Solution Approach 1:
The patent introduces dynamics by allowing the synthesis process to adaptively choose between deterministic and non-deterministic FSM implementations based on the specific assertion and verification context. This dynamic approach enables tool compatibility when deterministic FSMs are needed while allowing non-deterministic FSMs for improved efficiency when appropriate, resolving the contradiction between verification efficiency and ease of operation.
Data Source
AI summary
A method and system for implementing context aware synthesis of assertions is disclosed. The method and system for assertion synthesis includes converting an assertion formula to sequence implication form using semantic preserving rewrite rules, performing optimizations on the resulting formula to reduce the number of state-bits in a final FSM (Finite State Machine), and synthesizing the resulting formula to the final FSM using context aware sequence synthesis.