Asymmetric Boosting Read with Look-Back for Memory Disturb
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Solution Overview
Problem
In memory devices with charge-trapping regions, program disturb occurs due to parasitic cells formed between memory cells, leading to threshold voltage upshifts, especially in 3D stacked structures where the distance between word lines decreases, affecting data retention and read accuracy.
Innovation Solution
The programming operation is optimized by using asymmetric boosting, where the pass voltage on a later-programmed word line is higher than a previously-programmed word line initially and then gradually lowered, and the read operation is optimized to account for different data states using specific sense operations and read voltages based on adjacent memory cell states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the distance between word lines is decreased in 3D stacked memory structures, then the memory density is improved, but program disturb occurs due to parasitic cells leading to threshold voltage upshifts
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting pass voltages applied to word lines during programming operations. Specifically, different pass voltages are used for different word lines depending on their position relative to the selected word line, and voltages are adjusted based on the programming state of adjacent memory cells. This prevents parasitic cell formation and threshold voltage upshifts while maintaining high memory density through reduced word line spacing.
2Reliability
If asymmetric boosting with varying pass voltages is used during programming, then program disturb is minimized, but the programming operation complexity increases
Solution Approach 1:
The patent implements dynamics by making pass voltages time-varying and position-dependent during programming operations. The pass voltage applied to each word line is dynamically adjusted based on the programming loop number, the word line position relative to the selected word line, and the data state of adjacent memory cells. This dynamic voltage adjustment minimizes program disturb while the complexity is managed through systematic voltage scheduling algorithms.
3Measurement precision
If multiple read voltages are used to account for different data states, then read accuracy is improved, but the read operation time increases
Solution Approach 1:
The patent applies segmentation by dividing the read operation into multiple sequential sense operations, each using a specific read voltage tailored to detect particular data states. Different read voltages are applied in sequence to sense different threshold voltage ranges corresponding to different stored data states. This segmented approach improves read accuracy by optimally detecting each data state while managing read time through efficient voltage sequencing and parallel sensing where possible.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes the programming of parasitic cells, reduces the widening of threshold voltage distributions, and improves data state distinction during read operations, enhancing the reliability and accuracy of memory cell programming and reading.
Implementation Method 1
A charge-trapping material can be used in memory devices to store a charge which represents a data state
Implementation Method 2
the pass voltage on a later-programmed word line is higher than a previously-programmed word line initially and then gradually lowered
Data Source
AI summary
A read operation compensates for program disturb when distinguishing between an erased-state and a lowest programmed data state, where the program disturb is a function of the data state of an adjacent, previously-programmed memory cell on a common charge-trapping layer. A programming operation avoids program disturb of the programmed data states by using asymmetric pass voltages. Before reading the memory cells on a selected word line (WLn), the memory cells on the adjacent, previously-programmed word line (WLn−1) are read. The read operation for WLn uses multiple read voltages—one for each data state on WLn−1, and one of the read results is selected based on the data state of the adjacent memory cell. Other read operations distinguish between each pair of adjacent programmed data states using a read voltage which is independent of the data state of the adjacent memory cell.