Asymmetric Buildup Layer Substrate Manufacturing
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Solution Overview
Problem
Existing methods for forming substrates with integrated circuit packages often result in inefficient use of buildup layers, leading to redundant layers, warping, and increased manufacturing costs, particularly when trying to achieve an unequal number of buildup layers on opposite sides of the core.
Innovation Solution
A method of manufacturing substrates with asymmetric buildup layers, where one surface has m buildup layers and the opposite surface has n buildup layers (m > n), involving drilling and desmearing of dielectric layers to form conductive interconnections while minimizing redundant layers and warping, by sequentially forming and desmearing dielectric and conductive layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If an equal number of buildup layers are formed on each side of the core, then structural symmetry and warping prevention are improved, but material efficiency and manufacturing cost are worsened due to redundant layers
Solution Approach 1:
The patent applies asymmetry by forming different numbers of buildup layers on opposite sides of the core substrate. Specifically, it creates a configuration where one side has more buildup layers than the other, allowing the substrate to achieve the required electrical routing complexity without adding redundant layers on both sides. This asymmetric layer distribution reduces material consumption while the patent compensates for potential warping through selective stiffener placement and core substrate design.
2Loss of substance
If coreless substrates are used to reduce buildup layers, then material cost is improved, but structural stability and warping control are worsened
Solution Approach 1:
The patent segments the substrate structure into a core substrate portion and multiple buildup layers, where the core provides structural support and the buildup layers provide routing functionality. By maintaining a core substrate rather than using a coreless design, the patent preserves structural stability and warping control while optimizing the number of buildup layers on each side to reduce material cost. The core acts as a stable foundation that prevents excessive warping even when buildup layers are asymmetrically distributed.
3Device complexity
If single-sided substrates are used to reduce buildup layers, then manufacturing complexity is improved, but area utilization and component attachment flexibility are worsened
Solution Approach 1:
The patent applies local quality by creating different numbers of buildup layers on different sides of the core substrate based on local routing requirements. Instead of using a single-sided substrate that limits all routing to one side, or a fully symmetric multi-layer design, the patent selectively adds buildup layers only where needed on each side. This allows efficient use of substrate area for component attachment while providing the necessary routing complexity in specific local regions.
Data Source
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AI summary
A method of manufacturing a substrate for use in electronic packaging having a core, m buildup layers on a first surface of the core and n buildup layers on a second surface of the core, where m ? n is disclosed. The method includes forming (m-n) of the m buildup layers on the first surface, and then forming n pairs of buildup layers, with each one of the pairs including one of the n buildup layers formed on the second surface and one of the remaining n of the m buildup layers formed on the first surface. Each buildup layer includes a dielectric layer and a conductive layer formed thereon. The disclosed method protects the dielectric layer in each of buildup layers from becoming overdesmeared during substrate manufacturing by avoiding repeated desmearing of dielectric materials.