Asymmetric Doherty Amplifier With Complex Load Matching at Power Back-Off
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Solution Overview
Problem
Conventional Doherty amplifiers face challenges in achieving high power added efficiency, linearizable power, and simple impedance matching while balancing the advantages and disadvantages of symmetric and asymmetric configurations, particularly at higher output power back-off levels.
Innovation Solution
The implementation of an asymmetric Doherty amplifier with a complex combining load (CCL) matching circuit and an input splitter that provides optimal RF signal amplitude and phasing relationships, utilizing asymmetric carrier and peaking power amplifier devices to enhance power added efficiency and gain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If an asymmetric Doherty amplifier configuration is used, then power added efficiency at back-off levels is improved, but linearity and gain deteriorate
Solution Approach 1:
The patent applies asymmetry by using a complex combining load impedance with different resistance and reactance components, rather than a simple real impedance. This asymmetric complex load configuration enables the amplifier to achieve better efficiency while maintaining improved linearity compared to conventional symmetric designs
Solution Approach 2:
The patent changes the load impedance parameters from a simple real value to a complex value with both resistive and reactive components. By optimizing the complex combining load impedance parameters ( resistance and reactance), the amplifier achieves simultaneous improvement in both efficiency and linearity performance
2Reliability
If a symmetric Doherty amplifier configuration is used, then linearity is improved, but power added efficiency at back-off levels deteriorates
Solution Approach 1:
The patent deliberately introduces asymmetry through the complex combining load impedance configuration, which breaks the symmetry of conventional Doherty amplifiers. This asymmetric design allows the amplifier to overcome the efficiency limitations of symmetric configurations while maintaining acceptable linearity through proper impedance optimization
3Loss of energy
If a complex combining load matching circuit is implemented, then power added efficiency is improved, but device complexity increases
Solution Approach 1:
The patent optimizes the complex combining load impedance parameters to achieve efficient power transfer and improved power added efficiency. By carefully selecting the resistance and reactance values of the complex load, the circuit achieves better efficiency without requiring overly complex matching networks
Data Source
AI summary
A Doherty power amplifier includes input circuitry that provides input signals to asymmetric carrier and peaking amplifiers (e.g., a peaking-to-carrier size ratio, α is greater than 1.15) with an absolute value of an input phase offset between 15 degrees and 165 degrees or between 195 degrees and 345 degrees. Carrier and peaking amplifier output signals are combined at a combining node. A complex combining load matching circuit, which is connected to the combining node, provides a complex impedance, ZL, with a non-zero reactive portion, xn. The output circuit between the peaking amplifier and the combining node has an electrical length of 0 or n*180 degrees (n=an integer value). The output circuit between the carrier amplifier and the combining node has an electrical length, θx, where a difference between the electrical lengths of the peaking output circuit and the carrier output circuit is equal to the input phase offset.