Bias and pre-distortion switching lets a power amplifier improve low-power EVM while limiting out-of-band noise at higher output levels.
Suppression circuits use resonant capacitor-inductor paths to shunt nonlinear increment signals and improve multi-frequency power amplifier efficiency.
Switchable inductance and capacitance keep RF amplifier phase consistent across gain settings, avoiding complex calibration in demodulation.
Real-time monitoring of power, current, and temperature adjusts transistor array size to improve RF amplifier efficiency and signal quality.
MOS transistors in the triode region feed output signals back to cut third-order nonlinearity with low noise, power, and chip-area overhead.
Separate in-band and out-of-band predistortion improves RF power amplifier linearization while reducing computation load and convergence instability.
Opposite-type MOSFET compensation stabilizes capacitance variation to curb AM-PM and AM-AM distortion and improve power amplifier linearity.
A resonant feedback path at twice the input frequency cancels third-order intermodulation in low-gain LNAs while preserving low noise figure.
Switched-capacitor feedback can mix with clock signals and create aliasing tones; this circuit cancels them to preserve stable, clean amplifier output.
A PTAT bias circuit stabilizes envelope detector sensitivity across temperature changes while self-biasing transistors and reducing noise.
Vertical stacking, phase adjustment, and grounded shielding curb oscillation and improve heat dissipation in compact high frequency amplifiers.
Exchanging power amplifier non-linearity updates lets transmitters and receivers align DPD and DPoD to improve wireless signal quality.
Coarse VSWR quadrant sensing lets the baseband choose DPD coefficients for changing PA loads, improving linearity with less memory and calibration.
A compensation feedback circuit cancels background noise in non-contact biosignal sensing, enabling higher gain without amplifier saturation.
Cascaded multi-rate compensators improve RF power amplifier linearity while cutting coefficient count, circuit area, power use, and ACLR.
Weighted auxiliary predistortion models track GaN power amplifier state changes in TDD operation, improving accuracy with lower complexity.
Feedforward capacitors and dynamic compensation bypass phase-delaying local feedback to preserve amplifier stability, fidelity, and low power.
Variable phase shifting matched to discrete supply voltages cuts nonlinear distortion in RF power amplifiers while easing digital pre-distortion load.
A nonlinear correction path compensates early-sampled integrator errors in hybrid multi-level converter amplifiers, reducing distortion and stabilizing PWM control.
Dynamic PA supply voltage control uses nonlinearity thresholds to cut power use while maintaining radio performance.
A bidirectional common-mode feedback circuit stabilizes RF amplifier output voltage and gain across power, temperature, and process shifts.
Alternating partial gain reductions across amplifier stages improve sensitivity, overload behavior, BER floor, and frequency response.
Anti-jitter storage flag processing aligns asynchronous downlink and feedback clocks to keep DPD data delay constant and acquisition accurate.
Predistortion with voltage and junction-temperature compensation stabilizes RF power amplifier output and reduces MRI signal distortion.
Dynamic auxiliary PA biasing matches echo power in RFID readers to maintain cancellation while cutting energy use, heat, and battery drain.
Multiple complex filters pre-equalize the input vector to correct PA-induced AM-AM and AM-PM errors and reduce spectrum regrowth.
Selective digital predistortion on the higher WLAN band improves signal quality while avoiding unnecessary power use on lower-band paths.
A Miller-effect bias loop adapts bandwidth to suppress RF amplifier memory effects, improving ACPR, AM-AM distortion, and stability.
Precomputed phase correction terms counter AM-PM distortion from PA and RF frontend group delay, limiting spectrum regrowth in wideband transmission.
Combining consecutive under-sampled DPD feedback samples cuts buffering and coefficient training load while preserving key signal statistics.
Wideband signals are split into sub-bands so digital predistortion can run at lower sampling rates with less power use and heat.
A fixed parallel capacitor stabilizes cascode capacitance across voltage swings, reducing AM-PM phase shift and power use in RF amplifiers.
Fast intra-symbol APT voltage changes let the PMIC track RF peaks within OFDM symbols, reducing clipping while improving PA efficiency.
Electronic switches and a coupled transformer merge LNA and phase inversion functions to cut RF amplifier size and power use.
Multiple parallel amplifier branches and an impedance inverter keep the main path impedance stable, improving bandwidth and back-off efficiency.
Separate low- and high-power bias paths reduce gain compression and ACLR degradation while preserving RF amplifier linearity.
Channelized resistors and capacitors flatten RF amplifier gain and phase compression, improving output power and reducing distortion.
Discrete supply-voltage switching with mode-specific DPD parameters cuts nonlinear distortion while managing power use in power amplifiers.
Fixed-point dither and reference coefficients stabilize power amplifier linearization updates, improving convergence and reducing distortion.
Time-varying loopback separation lets transmit and loop-back distortion be estimated independently for more stable broadband signal compensation.
Forward and reverse power sensing lets the processor adapt DPD and equalization to offset PA memory effects under antenna mismatch.
Variable coupling impedance tracks input power to correct adaptive bias nonlinearity and improve power amplifier linearity.
Signaling updated power amplifier non-linearity parameters keeps transmitter DPD and receiver DPoD aligned as distortion behavior changes.
Bias-controlled peak impedance counters millimeter-wave Doherty efficiency loss while improving linearity without digital pre-distortion.
A cascaded mix of transistor capacitance profiles keeps amplifier distortion low near saturation without bulky detection or adjustment circuits.
A common-gate output stage and tightly coupled inductors keep the load consistent, preserving amplifier linearity in triode operation.
An impedance unit isolates the log power detector from the RF amplifier, reducing insertion loss and preserving linearity for accurate power sensing.
Forward and reverse power sensing guides AI-based predistortion and bias tuning to correct RF amplifier nonlinearity, memory effects, and load mismatch.
Complex-signal feature construction enables ML-based CFR and DPD across non-contiguous radio bands with lower processing complexity.
Shifted envelope and gain shaping tables cut impedance-modulation phase and amplitude distortion while preserving RF power efficiency.
Multiple magnetically coupled inductors help this LNA cut noise figure while improving impedance matching, bandwidth, linearity, and CMOS integration.
Transform-domain phase rotation aligns feedback and input vector signals for digital predistortion with lower complexity and power use.
A comparison-voltage and compensation-current scheme stabilizes transistor bias during high-output amplification to preserve gain and linearity.
Discrete phase mapping and multi-stage combining let efficient Class D or F amplifiers handle high-PAPR RF signals with lower loss.
Parallel sub-amplifiers, including a cascode stage, correct PA distortion while lowering insertion loss and error-amplifier power.
Opposing-polarity differential outputs cancel amplifier non-linearity, improving signal quality and reducing bit error rates.
Under-sampled feedback samples are combined to preserve training statistics while reducing DPD buffering, chip data-rates, and coefficient estimation load.
A λ/4 line and LC resonant combiner inject the carrier’s 2nd harmonic into the peaking PA to improve back-off efficiency and linearity.
RBF kernel regression linearizes multiband power amplifiers with lower DPD complexity, avoiding Volterra order growth and enabling 1D LUTs.
Direct photodiode connection with differential voltage compensation cuts noise, supply voltage, and circuit complexity in high-frequency current amplification.
A series resistive element above 100 ohms at the common node filters RF interference, cutting offset and improving PSRR.
Time-multiplexed feedback lets multi-band RF amplifiers share one linearization path, reducing group delay and inter-modulation errors.
Signal-level detection times audio channel changes to masking intervals, reducing pops, clicks, and DC offset artifacts.
Pre-trained ML models let a base station correct uplink power amplifier distortion, improving coverage and signal quality with less PA backoff.
Separate LC harmonic reduction circuits and a phase shift line suppress high-order harmonics while preserving fundamental wave transmission.
A power-dependent coupling impedance reshapes the amplifier bias signal to limit adaptive-bias nonlinearity while preserving efficiency.
A fixed inductor with switchable shunt capacitors gives a multi-gain LNA compact source degeneration with stable response and low noise.
Iterative DPD training expands pilot bandwidth step by step to keep OOB emissions compliant while preserving transmit power in massive arrays.
Delay-aware LUT control aligns envelope tracking supply voltage with the RF power envelope to cut clipping, compression, and power use.
A switched reception and feedback path separates multiple carriers by time slot, reducing intercarrier interference in irregular spectrum use.
A LUT, envelope synchronization circuitry, and pre-distortion align supply voltage with the RF power envelope to cut clipping, compression, and power loss.
Input signal level detection adjusts bias current across power modes to limit gain compression and expansion in RF power amplifiers.
A constant-k bandpass phase slope circuit aligns carrier and peaking paths in a Doherty amplifier to cut power ripple and widen full-power bandwidth.
Post-PA switching reuses a 2G power amplifier for 4G/5G dual connectivity, cutting extra PA count, PCB space, and cost.
Complementary gain-mimicking switches generate compensation current to cancel MOSFET leakage, improving gain linearity and temperature stability.
A thermally linked and isolated transistor pair adjusts amplifier bias as temperature rises, limiting gain drift and preserving EVM in pulsed operation.
Superposed signal power is measured across phase offsets to correct cable-length errors and set precise phase differences over varying frequencies.
IM2 injection and velocity-matched predistortion linearize Mach-Zehnder RoF links to raise SFDR with low noise and lower power.
Lower-dimensional LUTs decompose multiband digital predistortion, cutting memory and computation cost while preserving scalable band support.
Varying effective gate lengths in a Multi-Tanh differential FET balances IP2 and IP3, improving even- and odd-order linearity over wide bandwidths.
An extremum seeking controller tunes RF predistortion phase and amplitude to suppress PA intermodulation, harmonics, and spectral regrowth.
Suspending feedback accumulation during low input and blanking prevents power amplifier overshoot, undershoot, and distortion.
A shared primary correction circuit plus per-channel secondary circuits cuts RF transceiver power and area while preserving nonlinear distortion accuracy.
Adjustable termination impedance and mode switching help a power amplifier sustain efficiency and linearity across VSWR variation and beam scanning.
Digital pre-distortion and phase compensation curb AM/PM distortion in load-modulated power amplifiers while preserving RF efficiency.
Back-gate auxiliary transistors boost RF/mmWave differential amplifier gain while neutralizing parasitics, improving linearity and layout compactness.
A separate low-power clip-limiting path attenuates input only near threshold, cutting amplifier noise, clipping, and quiescent current.
A resistor-matched programmable-gain amplifier preserves linearity on large single-ended inputs while filtering high-frequency noise.
Opposite third-order capacitor characteristics cancel RF nonlinearity, cutting intermodulation distortion and improving circuit linearity.
Single-power DMRS with nonlinear reference-signal modeling removes distortion during channel estimation to improve demodulation and decoding.
Remote computing updates power amplifier predistortion only when operating conditions shift, cutting base station feedback complexity and compute load.
Operation status signals help a neural-network predistortion scheme maintain power amplifier signal quality as temperature, frequency, or bias changes.
Multiple transconductance units target nonlinearity at input, output, and intermediate nodes to improve analog circuit compensation reliability.
Residual-based DPD coefficient updates cut polynomial matrix computation while improving PA linearity, EVM, and ACLR.
A cascode and dual differential pairs cancel transient bias-current variation, cutting amplifier error voltage without extra supply headroom.
Dynamic bias equalization tracks output power to compensate AM-AM and AM-PM distortion while improving PAE, linearity, EVM, and P1dB.
A traveling-wave preamplifier and post amplifier improve ultra-wideband linearity without narrow-band linearization or low-power backoff.
Digital offset, amplitude, and delay calibration replaces variable resistors to extract distortion components more accurately and reduce noise.
A feed-forward self-calibrating module adjusts PA bias in real time to improve the PAE-linearity trade-off and reduce unit variation.
Labeled power features guide an ML-based DPD model to cut nonlinear distortion under dynamic traffic while accounting for long-term memory effects.
Feedback-updated digital pre-distortion cancels power amplifier nonlinearities in phased arrays, improving efficiency and signal fidelity.
Collaborative DPD and DPoD control cuts ACLR and EVM in radio transmitters while supporting efficient PA operation under emission limits.
High-PAPR reference signals and neural network models characterize power amplifier nonlinearity, enabling distortion compensation and better power efficiency.
Adjusting parallel resonance lowers envelope impedance across band gaps, expanding video bandwidth and improving DPD linearity.
Multiple amplifier models are blended by internal state to simulate Idq drift and improve distortion compensation evaluation.
Selecting among drain-voltage-based optimal gate bias points helps a power amplifier minimize IM3 while balancing linearity and power use.
A Schottky diode with lower threshold voltage sustains bias in a compound-semiconductor RF amplifier, preserving gain and output at low supply voltage.
Auxiliary amplification and phase shifting cancel peak-path leakage in a Doherty amplifier, reducing distortion while preserving efficiency and gain linearity.
Feedback-updated behavioral pre-distortion offsets phased-array PA nonlinearities, preserving signal purity while enabling efficient low-cost amplifiers.
Time-domain ACLR feedback replaces complex FFT calibration to adjust envelope delay in wireless transmit paths for better power and transmission control.
Base-current comparison in a cascode power amplifier detects saturation early and retunes load impedance to limit compression and distortion.
Dynamic amplitude and phase adjustment cuts Doherty amplifier distortion as nonlinear behavior shifts with temperature and aging.
A single-stage variable gain equalizer suppresses excessive PAM amplification, preserving multi-level signal quality while cutting area and power.
Multiple switchable LNA paths cut current in low-gain modes while preserving input match, linearity, and noise figure across wide dynamic range.
A subthreshold bias on non-selected VGA amplifiers creates counter-phase distortion signals, improving output purity and SNDR.
Capacitive coupling and a shunting capacitor create a virtual AC gate reference that cuts parasitic inductance and stabilizes differential cascode amplifiers.
Segmented visual feedback shows how far an adjusted signal level is from a reference, enabling more accurate matching without multiple panel scales.
Switching between open-loop and closed-loop modes by signal amplitude cuts ADC power and size while limiting low-level noise and high-level distortion.
Dynamic input power monitoring adjusts hard and soft signal limits to protect switching amplifiers while reducing distortion.
Turning off a dedicated LNA branch preserves input matching and linearity in low-gain mode without the noise penalty of auxiliary amplifiers.
Switched feedback paths let a class-AB voltage-to-current converter cut power and noise while preserving linear differential current output.
A feedback circuit cuts op-amp input swing and balances induced noise, improving linearity and output accuracy in differential-to-single-ended conversion.
Envelope-feedback bias processing corrects GaN RF amplifier drift and charge trapping without baseband latency, improving stability and linearity.
Separate inverse-function updates for each power amplifier improve distortion compensation accuracy and lower ACLR in multi-antenna transmitters.
Analog cancellation removes the linear transmit component before ADC, cutting converter demands while suppressing residual PA echo distortion.
Injected second-order intermodulation tones cancel IM3 distortion in an RF power amplifier input path without sacrificing efficiency.
A sensing resistor generates a cancellation current that stabilizes virtual ground in switched-capacitor DAC integrators without high power or calibration.
Uses dual resonant filtering and symmetry-node feedback to reject odd and even harmonics while correcting differential RF mismatch.
Feedback-based gain normalization derives inverse compensation coefficients to stabilize burst-mode power amplifier output and reduce transmission errors.
Narrow-band feedforward cancellation cuts intermodulation distortion in broadband amplifiers while preserving linearity with lower power use.
A capacitor-based frequency-dependent impedance path improves low-frequency linearity and lowers output impedance in flipped-voltage-follower input buffers.
Piecewise spline correction models power amplifier nonlinear behavior with lower computation, fewer errors, and better specification compliance.
A multi-output supply and pulse shaping network switch RF amplifier bias paths to balance transmitter efficiency, linearity, and emissions.
Pre- and post-tuned reference voltages help a differential PAM-4 receiver detect bit values accurately despite signal distortion.
Neural networks model power amplifier nonlinearity and memory effects to generate predistorted signals that improve EVM and ACLR.
Dynamic feedback paths switch by input range to keep voltage-to-current conversion linear while cutting power use and noise.
A sensor-less flux-based control approach corrects loudspeaker voice coil and suspension nonlinearity to cut distortion with low computational cost.
Frequency-offset adaptation lets one digital predistortion function handle gain and band changes, improving PA linearity without recalibration.
Resonant second- and third-harmonic termination improves impedance control and peak efficiency in envelope-tracking RF power amplifiers.
A Volterra-series equalizer uses Pth-order inverse transfer functions to correct non-linear distortion with high accuracy and lower complexity.
A resistor-capacitor bias network limits thermal positive feedback while maintaining impedance matching and power-gain linearity.
Periodic full-band calibration corrects RF chain and multiport amplifier defects in satellite payloads without interrupting service.
A switchable compensator and low-pass feedback path preserve signal fidelity in Class D amplifiers while avoiding clipping and self-oscillation.
A thermally linked sensing transistor adjusts amplifier bias during self-heating to hold gain steady and improve EVM in pulsed operation.
Separate supply control for cascaded amplifier stages cuts phase-related distortion and insertion loss while preserving power efficiency.
Acoustic monitoring infers speaker excursion limits from distortion, cutting calibration time and equipment while preventing overexcursion damage.
Two differential paths with clamping and summing cancel uneven common-mode noise in high-speed data channels while preserving signal integrity.
Integrated electro-optical chips placed close to the ASIC cut signal loss and power while enabling dense, reworkable high-speed links.
Stored band-specific voltage settings let RF amplifiers meet required output power across multiple bands with better efficiency and lower hardware complexity.
A filtered cascode stage feeds AC components to transistor gates, cutting high-frequency distortion and improving class AB amplifier linearity.
A transmit path that bypasses the T/R switch cuts switching loss and improves RF front-end linearity, especially at high frequencies.
Switching branch resistance changes bias current and RF impedance so one power amplifier can better balance 2G, 3G, and 4G efficiency and linearity.
Injected cosine and sine test signals enable precise I/Q gain and phase correction, improving receiver EVM and ADC dynamic range.
Dynamic phase modulation keeps main and auxiliary Doherty amplifier paths aligned across envelope voltages, improving back-off efficiency and saturation power.
A replica circuit and current mirror compensate nonlinear PA I/O capacitance, reducing envelope-tracking memory distortion at high bandwidths.
A filtered current-mirror bias circuit suppresses RF high-frequency leakage to hold the bias point steady and preserve amplifier linearity.
Dynamic impedance and bias-voltage adjustment keeps amplifier linearity stable across signal, supply, and temperature changes.
Complex combining load matching and phase-offset splitting raise Doherty amplifier efficiency at power back-off without sacrificing linearizable power.
Adjusting envelope tracking delay from resource block allocation helps suppress RF spectral regrowth without costly high-performance amplifiers.
A true real wideband model captures even-order distortion and negative frequency fold-over to linearize power amplifiers with lower complexity.
Predistortion, tilt filters, and wideband equalization flatten coaxial channel response and reduce amplifier distortion in DOCSIS transmission.
Segmented cable headend paths use digital up-tilt and per-PA pre-distortion to cut power and component count while limiting distortion.
A compensation capacitor adds zero compensation and saturation control to cut Class-D amplifier distortion while improving phase margin and stability.
A narrow band-pass feedback path extends DPD bandwidth in wideband RF amplifiers while lowering sampling-rate, filter, and power demands.
A DC tracking circuit sets a bias level tied to the output node to suppress second harmonic distortion and improve source follower linearity.
Using non-constant envelope reference signals, the receiver estimates PA nonlinearity for feedback and digital distortion correction.
Capacitive bias feedback raises differential amplifier gain while widening linear range and cutting clipping, distortion, and noise.
Analog conditional one counting enables blind PAM channel estimation, cutting equalizer tuning time and power while improving signal recovery.
A bias circuit balances rise and fall times in a switching-mode amplifier to cancel pulse width distortion and suppress second-order harmonics.
A resistor-assisted amplifier converts single-ended input to differential signals for ADCs while cutting noise, distortion, layout area, and power.
Feedback-based digital suppression cuts downstream-to-upstream RF self-interference in distributed antenna units, reducing duplexer cost and size.
Weighted averaging of current and prior nonlinearity data stabilizes digital pre-distortion updates for better convergence and lower distortion.
Independent digital gain, phase, and delay control across MOPA bands improves linearity and efficiency while reducing path calibration burden.
A compensation transistor cancels second-harmonic current in a cascode amplifier, avoiding bulky off-chip filters for compact 5G IoT radios.
A tunable transformer-capacitor trap creates high impedance at the second harmonic, cutting LNA intermodulation without extra power or complexity.
A regulator-based supply circuit reduces envelope impedance and preserves power amplifier linearity across wide 5G bands without added capacitors.
A phase-shifted reverse coupling signal suppresses rIMD in power amplifiers, enabling concurrent LTE and 5G-NR operation within SEM limits.
A single bipolar transistor with DC bias control avoids cascode saturation limits, enabling larger RF signals with less distortion and smaller area.
A voltage drop element between OPAMP internal nodes decouples DC levels, improving bias control, linearity, noise, and phase margin.
Multiple overlapping amplifier paths and diplexer combining deliver high power over wide bandwidth with lower broadband amplifier complexity.
Dynamic reactance tuning lets one RF balun support 433, 868, and 916 MHz bands without separate discrete baluns.
A variable bias current tracks input amplitude and frequency content to reduce gain compression, preserve linearity, and lower amplifier power use.
Parallel split amplifier sections and a switchable linearization circuit preserve SNR and prevent saturation when jammers force low-gain operation.
A feedback-based delay calibration path keeps envelope and main signal paths aligned during transmission, improving PA efficiency and battery use.
A coupling transistor lets cascode gate nodes track drain voltage during deactivation, cutting stress, leakage, and linearity loss.
Digital pre-distortion compensates GaN amplifier transients in pulse radar, improving phase stability and clutter rejection without fill pulses.
Adaptive buffer and termination switching helps one reception interface support multiple standards while improving noise tolerance and link compatibility.
Moving digital pre-distortion into the RF domain handles wider bandwidths while reducing interface load, hardware complexity, and power use.
A bandwidth-compressed envelope with peak look-ahead boosts power amplifier efficiency while suppressing clipping and amplitude compression.
Binary-controlled current sources let the driver switch between limit and linear modes, cutting power use while preserving modulation quality.