Input Buffer Frequency-Dependent Impedance for Low-Frequency Linearity

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Solution Overview

Problem

Conventional input buffers face challenges in achieving high linearity and low output impedance, particularly in the low-frequency region, which affects their ability to perform effective high-to-low resistance transformation.

Innovation Solution

A high-linearity input buffer is designed using a flipped voltage follower in pseudo-differential or single-ended architecture, coupled with a frequency-dependent impedance circuit that includes a capacitor and resistive elements to maintain loop gain and reduce output impedance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional input buffer is used, then the circuit provides basic impedance transformation, but the linearity is poor and output impedance is high in the low-frequency region

Engineering Contradiction:
ImprovelinearityVSAvoidcircuit architecture
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The input buffer is divided into a pseudo-differential architecture with separate positive and negative input transistors (M1p, M1n) and corresponding output transistors (M2p, M2n). This segmentation allows independent control of differential signals and enables the frequency-dependent impedance circuit to differentially cancel even-order harmonics, improving linearity without requiring a completely complex redesign

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A frequency-dependent impedance circuit is introduced that dynamically adjusts its behavior based on frequency. The circuit uses capacitors (Cc1, Cc2) and resistors (Rc1, Rc2) to create frequency-selective feedback paths that cancel even-order harmonics at specific frequencies while maintaining proper impedance transformation across the operating band

Inventive Principle:
Principle #15Dynamics

2Reliability

If the buffer operates in the low-frequency region, then impedance transformation is required, but output impedance remains high affecting transformation effectiveness

Engineering Contradiction:
Improveimpedance transformation effectivenessVSAvoidoutput impedance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The frequency-dependent impedance circuit implements frequency-selective feedback through capacitors Cc1 and Cc2 connected to resistors Rc1 and Rc2. This feedback path senses the output signal and injects a corrected signal back to the input stage, specifically targeting and canceling even-order harmonics and reducing output impedance in the low-frequency region where impedance transformation is most critical

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The impedance characteristics of the buffer are made frequency-dependent through the use of capacitors and resistors in the feedback circuit. The circuit parameters (impedance magnitude and phase) automatically adjust with frequency, providing low output impedance at low frequencies for effective transformation while maintaining stability at higher frequencies

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If a pseudo-differential architecture is used with frequency-dependent impedance circuit, then linearity is improved, but the device complexity increases

Engineering Contradiction:
ImprovelinearityVSAvoidnumber of transistors and components
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The frequency-dependent impedance circuit serves multiple functions simultaneously: it cancels even-order harmonics to improve linearity, reduces output impedance in the low-frequency region, and maintains impedance transformation across the operating band. The pseudo-differential architecture also provides differential signal handling and common-mode rejection. By making components perform multiple functions, the patent achieves high linearity without proportionally increasing complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4164124A1High-linearity input buffer
Publication Date: 2023.04.12 MEDIATEK SINGAPORE PTE LTD
  • EP4164124A1 patent drawingFigure 1
  • EP4164124A1 patent drawingFigure 2
  • EP4164124A1 patent drawingFigure 3

AI summary

An input buffer using a frequency dependent impedance circuit to compensate for nonlinearity in low frequency is shown. In a pseudo-differential architecture, a frequency-dependent impedance circuit is coupled between the drain of a positive input transistor of the flipped voltage follower and the drain of a negative input transistor of the flipped voltage follower. In a single-ended architecture, the frequency-dependent impedance circuit is coupled between the drain of an input transistor of the flipped voltage follower and an alternating current ground. The frequency-dependent impedance circuit includes a capacitor.