Class-D Amplifier Integrator Compensation for Saturation-Induced Distortion

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Solution Overview

Problem

Class-D amplifiers experience distortion due to saturation of integrators, leading to reduced output audio signal quality and instability, particularly in high-frequency applications.

Innovation Solution

Incorporating a compensation capacitor and additional components in the integrator circuit to provide zero compensation, increasing phase margin and stabilizing the amplifier, while controlling saturation through a switch and resistor configuration to reduce distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a higher-order integrator is used to reduce distortion, then distortion reduction is improved, but the integrator becomes more prone to saturation and instability

Engineering Contradiction:
Improvedistortion reductionVSAvoidintegrator stability
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The patent changes the electrical parameters of the integrator circuit by adding a compensation capacitor in parallel with the feedback resistor. This modifies the transfer function of the integrator, adding a zero to the system that compensates for the poles created by the higher-order integration, thereby improving stability while maintaining distortion reduction performance.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The compensation capacitor acts as an intermediary element that mediates between the conflicting requirements of high integration order (for distortion reduction) and system stability. By introducing this intermediate component, the patent resolves the contradiction by providing a mechanism that allows both high-order integration and stability to coexist.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If a higher-order integrator is used to reduce distortion, then distortion reduction is improved, but phase margin decreases leading to instability

Engineering Contradiction:
Improvedistortion reductionVSAvoidphase margin
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The compensation capacitor changes the frequency response parameters of the integrator by introducing a zero in the transfer function. This zero adds phase lead that compensates for the phase lag introduced by the higher-order integration, thereby increasing the phase margin and improving reliability while maintaining distortion reduction.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If integrator saturation is allowed to occur, then circuit complexity is reduced, but output signal quality deteriorates due to distortion

Engineering Contradiction:
Improvecircuit complexityVSAvoidoutput signal quality
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The compensation capacitor provides beforehand cushioning by preventing integrator saturation before it occurs. The additional degree of freedom introduced by the capacitor allows the system to maintain linearity and avoid saturation under high-input conditions, thereby protecting output signal quality without requiring more complex circuitry.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS10749479B2Amplification systems and methods with distortion reductions
Publication Date: 2020.08.18 ON BRIGHT INTEGRATIONS CO INC
  • US10749479B2 patent drawing
  • US10749479B2 patent drawing
  • US10749479B2 patent drawing

AI summary

System and method for integrating an input signal to generate an output signal. The system includes a first integrator configured to receive the input signal and generate an integrated signal based on at least information associated with the input signal, a second integrator configured to receive the integrated signal and generate the output signal based on at least information associated with the integrated signal, and a compensation capacitor coupled to the first integrator and the second integrator. The first integrator includes a first integration capacitor and a first operational amplifier including a first input terminal and a first output terminal, the first integration capacitor being coupled between the first input terminal and the first output terminal. The second integrator includes a second integration capacitor and a second operational amplifier including a second input terminal and a second output terminal.