Power Amplifier Bias Equalization for AM-AM and AM-PM Control
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Solution Overview
Problem
Existing power amplifiers face challenges in achieving good amplitude-to-amplitude modulation (AM-AM) and amplitude-to-phase modulation (AM-PM) metrics while maintaining high power added efficiency (PAE), linearity, and error vector magnitude (EVM) performance.
Innovation Solution
The proposed solution involves a new equalization approach that compensates for AM-AM and AM-PM variations in amplifiers by controlling bias conditions, such as bias voltage, versus output power to alter the AM-AM and AM-PM profiles. This approach is applicable to all frequencies, technologies, and types of amplifiers, including power amplifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If operation is performed further away from the 1 dB compression point to improve linearity and EVM performance, then AM-AM and AM-PM metrics are improved, but power added efficiency significantly degrades
Solution Approach 1:
The patent implements dynamic bias voltage adjustment that adapts to the operating point of the power amplifier. The equalization circuit continuously modifies the bias voltage based on the instantaneous output power level, allowing the amplifier to operate dynamically across different efficiency and linearity regions rather than being fixed at a single operating point.
Solution Approach 2:
The patent changes the bias voltage parameter as a function of output power to compensate for AM-AM and AM-PM distortions. By adjusting the bias voltage dynamically, the amplifier's gain and phase characteristics are modified to counteract the non-linear effects that occur at different power levels.
2Manufacturing precision
If high current density is used to achieve good AM-AM and AM-PM metrics in IC FET fabrication technologies, then linearity metrics are improved, but power added efficiency and thermal performance deteriorate
Solution Approach 1:
The patent changes the bias voltage parameter as a function of output power to compensate for AM-AM and AM-PM distortions. By adjusting the bias voltage dynamically, the amplifier's gain and phase characteristics are modified to counteract the non-linear effects that occur at different power levels.
Solution Approach 2:
The equalization circuit acts as an intermediary between the input signal and the power amplifier, preprocessing the signal to pre-compensate for anticipated AM-AM and AM-PM distortions. This allows the amplifier to operate more efficiently without requiring extreme current densities.
3Manufacturing precision
If digital pre-distortion is used to improve linearity and EVM performance, then AM-AM and AM-PM metrics are improved, but circuit complexity and design issues increase
Solution Approach 1:
The equalization circuit acts as an intermediary between the input signal and the power amplifier, preprocessing the signal to pre-compensate for anticipated AM-AM and AM-PM distortions. This allows the amplifier to operate more efficiently without requiring extreme current densities.
Solution Approach 2:
The patent changes the bias voltage parameter as a function of output power to compensate for AM-AM and AM-PM distortions. By adjusting the bias voltage dynamically, the amplifier's gain and phase characteristics are modified to counteract the non-linear effects that occur at different power levels.
Data Source
AI summary
Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.