Power Amplifier Bias Compensation for High-Output Linearity

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Solution Overview

Problem

Power amplification circuits face challenges in maintaining linearity during high-output power amplification due to changes in bias current or voltage, which affect the operation and linearity of amplifying devices.

Innovation Solution

A power amplification circuit design that includes a first transistor, a second transistor, a comparison-voltage generation circuit, and a compensation circuit. The compensation circuit generates a compensation current based on a comparison voltage and a reference voltage to maintain the bias current or voltage, thereby maintaining the gain and linearity of the amplifying device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If power amplification with high output power is performed, then output power is improved, but linearity deteriorates due to changes in bias current or voltage

Engineering Contradiction:
Improveoutput powerVSAvoidlinearity
Core Design Contradiction:
PowerVSStability of the object's composition

Solution Approach 1:

The patent implements a feedback mechanism where the bias circuit monitors changes in bias current or voltage caused by alternating-current signals and automatically adjusts to compensate for these changes. This feedback loop maintains the DC operating point stability while allowing high output power amplification, thereby preserving linearity even under high-power conditions

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically adjusts bias circuit parameters (current or voltage) in response to alternating-current signal variations. By changing the bias parameters adaptively, the system maintains optimal operating conditions for linearity while enabling high output power operation through controlled parameter modulation

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If bias current or voltage is supplied without isolation from alternating-current input, then device complexity is reduced, but linearity deteriorates due to alternating-current signal interference

Engineering Contradiction:
Improvebias circuit structureVSAvoidDC operating point
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The patent introduces an intermediary isolation mechanism between the alternating-current input and the bias current supply. This intermediary element (such as a capacitor or transformer) blocks alternating-current signals from reaching the bias circuit while still allowing the bias current to reach the amplifying device, thus preventing DC operating point shifts without significantly increasing overall system complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the bias supply path from the alternating-current signal path, creating separate independent circuits. This segmentation allows the bias circuit to operate independently without being affected by alternating-current variations, maintaining DC operating point stability while keeping the overall device structure relatively simple through modular design

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240333219A1Power amplification circuit
Publication Date: 2024.10.03 MURATA MFG CO LTD
  • US20240333219A1 patent drawing
  • US20240333219A1 patent drawing
  • US20240333219A1 patent drawing

AI summary

The power amplification circuit includes a first transistor that includes a base configured to receive a bias current or a bias voltage and that is configured to amplify an input signal and output a current and a second transistor that includes an emitter connected to the base of the first transistor and that is configured to supply the bias current to the base of the first transistor from the emitter. The power amplification circuit includes a comparison-voltage generation circuit configured to generate a comparison voltage based on an emitter current or voltage of the second transistor and a compensation circuit that is connected to the comparison-voltage generation circuit and that is configured to receive the comparison voltage and a reference voltage and generate a current with a decrease in the bias current or the bias voltage based on the comparison voltage and the reference voltage.