Differential FET Transconductor With Varying Gate Lengths for Linearity
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Solution Overview
Problem
Existing linear differential FET-based amplifiers face challenges in maintaining even and odd order linearity over wide bandwidths, often requiring trade-offs between second and third-order intercept points (IP2 and IP3), which limits their performance in applications like 5G and 6G millimeter integrated circuits and other wireless communication devices.
Innovation Solution
A Multi-Tanh differential linear FET transconductor with varying effective gate lengths is employed, allowing for simultaneous linear even and odd order operation by adjusting the gate lengths in a differential architecture, thereby balancing IP2 and IP3 and maintaining linear operation at the first and second derivatives of transconductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional FET amplifiers are used to achieve wide bandwidth operation, then bandwidth is improved, but linearity (even and odd order) deteriorates
Solution Approach 1:
The amplifier is divided into multiple parallel FET branches, each with different gate lengths. This segmentation allows each branch to contribute differently to the overall transfer function, enabling simultaneous optimization of bandwidth and linearity through the combined response of multiple segmented paths.
Solution Approach 2:
Each FET branch is assigned a specific gate length tailored to optimize particular linearity characteristics. The first branch uses a first gate length optimized for certain frequency ranges, while the second branch uses a second gate length optimized for complementary frequency ranges, creating local quality variations that collectively improve overall performance.
2Reliability
If gate length is varied to improve linearity, then even and odd order linearity is improved, but device complexity increases
Solution Approach 1:
Multiple FET branches with different gate lengths are merged in parallel configuration, sharing common input and output nodes. This merging approach consolidates the complexity into a unified structure where the combined transfer function achieves superior linearity without requiring separate complex circuits for each linearity order.
Solution Approach 2:
The gate length parameter is systematically varied across different FET branches to optimize the transfer function derivatives. By changing this critical geometric parameter, the invention achieves independent control over even and odd order linearity characteristics without fundamentally altering the basic amplifier architecture.
3Reliability
If multiple FETs with different gate lengths are used, then linearity performance is improved, but manufacturing precision requirements increase
Solution Approach 1:
Different gate lengths are intentionally designed for different FET branches as a deliberate local quality variation. This approach transforms what could be a manufacturing precision challenge into a designed feature, where each branch's specific gate length is optimized for its intended function in the overall linearity enhancement strategy.
Data Source
AI summary
A field effect transistor (FET) transconductance device with varying gate lengths is disclosed. In one aspect, the varying effective gate lengths are used in a differential architecture to obtain linear even and odd order operation simultaneously. In a particular aspect, the effective gate lengths may be varied according to a differential Multi-Tanh-like architecture. This variation of effective gate lengths enables a compact implementation particularly as compared to varying gate width or emitter areas while also providing linear even and odd order operation simultaneously.