Multi-Stage Smart Combiner for Efficient High-PAPR RF Amplification
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Solution Overview
Problem
Modern communications systems face challenges in achieving high spectral and power efficiencies due to the tradeoff between linearity and efficiency in power amplifiers, particularly for signals with high peak-to-average power ratio (PAPR), which leads to non-linear distortion and efficiency degradation in power amplification.
Innovation Solution
A multi-stage digital controlled power combining system that uses a digital controlled combiner, signal phase discrete mapper, and combiner digital control circuit to combine signals with discrete phases, optimizing reactive loading and reducing losses by employing Class D or Class F amplifiers and reactive combiners to maintain high efficiency across varying output power levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional power amplifiers are used to achieve linear amplification for high PAPR signals, then linearity is improved, but power efficiency deteriorates
Solution Approach 1:
The patent divides the power amplifier into multiple parallel amplifiers (first power amplifier and second power amplifier) that operate simultaneously. Each amplifier handles a portion of the input signal, allowing the system to achieve both linearity and efficiency by distributing the amplification task across multiple devices rather than relying on a single linear amplifier
Solution Approach 2:
The patent combines the outputs of multiple power amplifiers through a power combiner to produce the final output signal. This merging approach allows the system to leverage the efficiency benefits of non-linear amplifiers while maintaining the linearity requirements through proper signal combination and phase control
2Use of energy by moving object
If high efficiency power amplifiers (Class C, D, E, F, S) are used, then power efficiency is improved, but linearity deteriorates causing spectral distortion
Solution Approach 1:
The patent segments the amplification function across multiple parallel amplifiers, each operating in high-efficiency modes (Class C, D, E, F, or S). By dividing the total signal into parallel paths with efficient amplifiers, the system achieves high overall efficiency while maintaining linearity through the combination architecture
Solution Approach 2:
The patent employs feedback mechanisms to control the phase and amplitude of signals from multiple power amplifiers. This feedback ensures that the combined output maintains the required linearity and spectral characteristics while allowing each individual amplifier to operate in high-efficiency non-linear modes
3Power
If parallel power amplifier structures are used to increase output power, then power output is improved, but device complexity increases
Solution Approach 1:
The patent divides the high-power amplification task into multiple parallel lower-power amplifiers. This segmentation allows the system to achieve high output power through aggregation of multiple devices rather than requiring a single complex high-power amplifier, thereby managing complexity through modular architecture
Solution Approach 2:
The patent designs the parallel amplifier structure with universal components that can be configured for different power levels and signal requirements. The same basic amplifier and combiner architecture serves multiple functions including power amplification, signal combining, and efficiency optimization, reducing overall system complexity
Data Source
AI summary
Circuits and methods for use in amplifying amplitude and phase modulated signals. A circuit uses a digital controlled multi stage combiner, a signal phase discrete mapper and a combiner digital control circuit with N parallel signal feeding it. The signals resulting from N power amplifiers have phases with belonging to an alphabet with M discrete phases prior to being fed to the multi stage combiner. The phases of the N input signals are converted in an control signal generator into Ns sets of digital control signals to control N·M sets of switches where the signals are selected according the phase and sent to the corresponding combiner in the M possible combiners. Each one combiner from the set of M combiner then combines these signals. A second stage with digital controlled combiner, combines into two sub-sets of signals the signals resulting from first stage and the resulting outputs of the combiner are then combined by a third combining digital controlled stage into the output signal. The signal amplifiers employed before the combining stage may be Class D or Class F amplifiers to provide high efficiency amplification of the signals.