Asymmetric PCB Warpage Control via Differential Resin Curing

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Solution Overview

Problem

Printed circuit boards (PCBs) often experience warpage due to thermal stress and design limitations, leading to increased production costs and potential solder joint failures, especially in applications with rapid temperature changes and high-density electronic components.

Innovation Solution

An asymmetric printed circuit board design is created by differentially curing resin areas with varying coefficients of thermal expansion, predicted through computer modeling to minimize warpage, using non-uniform heating and insulating materials to control resin flow and curing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a PCB is designed symmetrically to counter warpage, then warpage is reduced, but design flexibility and adaptability are limited

Engineering Contradiction:
Improvewarpage controlVSAvoiddesign flexibility
Core Design Contradiction:
Stability of the object's compositionVSAdaptability or versatility

Solution Approach 1:

The patent applies local quality by creating asymmetric resin curing areas with different degrees of curing in specific regions of the PCB. This allows different parts of the board to have different thermal expansion characteristics, enabling warpage control while maintaining design flexibility for asymmetric component layouts and high-density interconnect applications.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent directly applies asymmetry by intentionally designing asymmetric resin curing patterns in the PCB laminate. The asymmetric curing creates non-uniform thermal expansion properties that compensate for warpage caused by asymmetric component placement, BGA configurations, and high-density interconnect structures, thereby resolving the contradiction between symmetry-based warpage control and design flexibility.

Inventive Principle:
Principle #4Asymmetry

2Ease of manufacture

If temperature fluctuations occur during PCB processing, then solder connections are formed, but thermal stress causes warpage and solder joint failure

Engineering Contradiction:
Improvesolder connection formationVSAvoidsolder joint reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-curing resin in specific asymmetric areas before final PCB assembly. This preliminary selective curing creates predetermined thermal expansion characteristics that compensate for upcoming thermal stress during soldering operations, preventing warpage and solder joint failure while maintaining ease of manufacture.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies preliminary anti-action by creating asymmetric resin curing patterns that generate counteracting thermal stress before the PCB undergoes temperature fluctuations during soldering. This preemptive measure opposes the warpage-causing thermal stress that will occur during manufacturing, thereby protecting solder joint reliability.

Inventive Principle:
Principle #9Preliminary anti-action

3Manufacturing precision

If PCB warpage exceeds tolerance, then the PCB must be discarded, but production costs increase due to batch production

Engineering Contradiction:
Improveflatness toleranceVSAvoidproduction cost
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies parameter changes by modifying the degree of resin curing in specific asymmetric areas to precisely control thermal expansion coefficients. This enables adjustment of PCB flatness parameters within tolerance limits, ensuring manufacturing precision while maintaining batch production efficiency and reducing waste, thereby lowering production costs.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The asymmetric design reduces warpage by allowing for localized adjustments in thermal expansion, minimizing solder joint failures and production costs while maintaining high flatness tolerance across operating temperatures.

Implementation Method 1

the at least two areas have different respective coefficients of thermal expansion, wherein a difference between the respective coefficients of thermal expansion of the at least two areas are predicted to reduce a warpage of the printed circuit board

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

temperature fluctuations and the design of a given PCB may result in excessive thermal stress, which may then lead to warpage of the PCB

Methodology Applied
Scientific EffectThermal stress: Thermal Expansion

Data Source

PatentUS11523519B2Fabricating an asymmetric printed circuit board with minimized warpage
Publication Date: 2022.12.06 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11523519B2 patent drawing
  • US11523519B2 patent drawing
  • US11523519B2 patent drawing

AI summary

A method for fabricating an asymmetric printed circuit board with minimized warpage. The method includes determining a first resin area and a second resin area in a stack of printed circuit board layers. The method further includes performing computer modeling to predict a warpage of the printed circuit board layers during a predicted use of the printed circuit board layers. The method further includes determining a first target coefficient of thermal expansion for the first resin area and a second target coefficient of thermal expansion for the second resin area based on the computer modeling. The method further includes differentially curing resin in the first resin area and the second resin area based on the first target coefficient of thermal expansion and the second target coefficient of thermal expansion. The method further includes forming an asymmetric printed circuit board from the stack of printed circuit board layers.