Asymmetric Stacked Semiconductor Structures Preventing Bit Line Bending
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Solution Overview
Problem
3D stacked memory structures with vertical gate structures face issues of bit line bending and word line bridging, which can render memory blocks useless, and existing manufacturing processes are complex and costly.
Innovation Solution
The semiconductor apparatus features alternating first and second stacked structures with different widths, where the supporting portions have larger widths than the operating portions, preventing bending and bridging, and a manufacturing method involving etching and dielectric structure deposition to simplify the process and reduce costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertical gate structures are made with larger heights and smaller widths to increase element density, then memory capacity and density are improved, but bit line bending and word line bridging occur more easily
Solution Approach 1:
The patent applies asymmetry by designing the supporting portion with a larger width than the operating portion. This asymmetric width configuration provides enhanced mechanical support to prevent bit line bending while maintaining the narrow operating portion width for high density. The supporting portion acts as a widened base that stabilizes the structure without increasing the active device width.
Solution Approach 2:
The stacked structure is segmented into distinct functional portions: operating portions for active memory functions and supporting portions for structural stability. This segmentation allows each portion to be optimized independently - operating portions maintain narrow widths for density while supporting portions have larger widths for prevention of bending and bridging.
2Manufacturing precision
If complex manufacturing processes are used to achieve precise stacked structures, then manufacturing precision is improved, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent merges the formation of operating and supporting portions into a single etching process. By using one etching step to create both types of portions with different widths, the manufacturing process is simplified while maintaining precise stacked structures. This combining approach reduces the number of separate fabrication steps required.
Solution Approach 2:
The etching process applies local quality by creating different widths at different locations within the stacked structure. The operating portions are etched to narrower widths while supporting portions are etched to larger widths, all in one process. This location-dependent etching achieves precise dimensional control without requiring multiple processing steps.
Data Source
AI summary
A semiconductor apparatus including a first stacked structure and a second stacked structure is provided. The first stacked structure and the second stacked structure are arranged along a first direction, and extended along a second direction perpendicular to the first direction. The first stacked structure includes a first operating portion and a first supporting portion. The first operating portion and the first supporting portion are alternately arranged along the second direction. A width of the first operating portion along the first direction is smaller than a width of the first supporting portion along the first direction.