Asymmetrical Processor Memory Architecture Reducing Data Movement
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Solution Overview
Problem
Existing processors face inefficiencies in accessing and transferring data between scalar and vector processing units, leading to increased time and power consumption due to extensive data movement between memory spaces, which hampers processing efficiency.
Innovation Solution
An asymmetrical processing system with a scalar unit and vector unit that share a contiguous memory space, allowing concurrent access and operation, with configurable memory access modes to optimize data retrieval, reducing the need for extensive data movement by enabling parallel or sequential processing within the same memory space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If separate memory spaces are used for scalar and vector processing units, then each unit can have dedicated storage, but data transfer between memory spaces increases time and power consumption
Solution Approach 1:
The patent merges the memory spaces of scalar and vector processing units into a single shared memory space. This allows both processing units to access the same memory without requiring data transfer between separate memory spaces, thereby reducing data transfer time and power consumption while maintaining dedicated storage capacity through logical separation.
Solution Approach 2:
The patent introduces a memory controller as an intermediary that manages memory access requests from both scalar and vector processing units. This controller optimizes data retrieval by coordinating access patterns and resolving conflicts, enabling efficient concurrent access to the shared memory space without requiring physical data transfer between separate memory spaces.
2Reliability
If data is transferred between separate memory spaces, then each processing unit has dedicated access, but power consumption increases due to extensive data movement
Solution Approach 1:
The patent combines separate memory spaces into a unified shared memory space that both scalar and vector processing units can access. This eliminates the need for extensive data movement between separate memory spaces, significantly reducing power consumption while maintaining reliable dedicated access through memory control and arbitration mechanisms.
3Ease of operation
If scalar and vector units access separate memory spaces, then access paths are isolated, but processing efficiency decreases due to extensive data movement
Solution Approach 1:
The patent merges the memory access paths of scalar and vector units into a shared memory architecture. This allows both units to access data simultaneously from the same memory space, eliminating the need for extensive data movement and significantly improving processing efficiency while maintaining ease of operation through coordinated memory access control.
Data Source
AI summary
An asymmetrical processing system is provided. The processor has a vector unit comprised of one or more computational units coupled with a vector memory space and a scalar unit coupled with a data memory space and the vector memory space, the scalar unit accessing one or more memory locations within the vector memory space.