Asynchronous Multicore Debugging via Common Timing Domain
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Solution Overview
Problem
Debugging heterogeneous multicore processors is challenging due to the lack of interaction between different tool sets, leading to increased costs and complexity, as multiple tools and debug probes are required for each separate core, which can be expensive and complicated.
Innovation Solution
An asynchronous multicore common debugging system synchronizes debug signals from multiple processor cores to a common timing domain, allowing a single debugging tool chain to track processing across all cores, including interprocessor communications, and provides a unified debugging interface for heterogeneous and asynchronous processor cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple tools and debug probes are used for each separate core, then debugging capability is provided, but cost and complexity increase
Solution Approach 1:
The patent merges multiple separate debugging tool sets into a single unified debugging system that can handle heterogeneous multicore processors. The unified system provides a common user interface and integrates previously separate debugging functionalities, allowing debugging of multiple different core types without requiring multiple independent tool sets, thereby reducing complexity while maintaining comprehensive debugging capability
Solution Approach 2:
The debugging system is designed with universal functionality to support multiple types of processor cores through a single tool set. The system can adapt to different core architectures and debugging requirements, providing multi-functional debugging capabilities that replace the need for specialized tools for each core type, thus reducing both cost and complexity
2Reliability
If multiple tools and debug probes are used for each separate core, then debugging capability is provided, but cost increases
Solution Approach 1:
The patent merges multiple separate debugging tool sets into a single unified debugging system that can handle heterogeneous multicore processors. The unified system provides a common user interface and integrates previously separate debugging functionalities, allowing debugging of multiple different core types without requiring multiple independent tool sets, thereby reducing complexity while maintaining comprehensive debugging capability
Solution Approach 2:
The debugging system is designed with universal functionality to support multiple types of processor cores through a single tool set. The system can adapt to different core architectures and debugging requirements, providing multi-functional debugging capabilities that replace the need for specialized tools for each core type, thus reducing both cost and complexity
3Adaptability or versatility
If different tool sets are used for different cores, then core-specific debugging is achieved, but interaction between tool sets is lost
Solution Approach 1:
The patent merges multiple separate debugging tool sets into a single unified debugging system that can handle heterogeneous multicore processors. The unified system provides a common user interface and integrates previously separate debugging functionalities, allowing debugging of multiple different core types without requiring multiple independent tool sets, thereby reducing complexity while maintaining comprehensive debugging capability
Solution Approach 2:
The unified debugging system acts as an intermediary that connects and coordinates debugging operations across multiple heterogeneous cores. It provides a common interface that mediates between the user and various core types, enabling interaction and correlation of debugging information across different cores that would otherwise be isolated in separate tool sets
Data Source
AI summary
A method and apparatus for an asynchronous multicore common debugging system is described. Debug signals from a plurality of processor cores are synchronized to a common timing domain. Processing completed within the plurality of processor cores during a common timing interval is tracked. A single debugging tool chain is utilized to provide debugging results in response to the tracking the processing completed within the plurality of processor cores during the common timing interval.