Asynchronous PWM Duty Cycle Updates to Prevent Control Loop Lag
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Solution Overview
Problem
Existing PWM generators in Switch Mode Power Supplies (SMPS) face delays in updating duty cycle values, leading to control loop instability and potential functional issues due to synchronous updates and 'roll over' problems, which cause lag and missed PWM cycles.
Innovation Solution
A digital PWM generator with a timer/counter, period register, and duty cycle register, along with comparators for immediate asynchronous updates, allowing the PWM signal to change logic levels based on equal-to-or-greater comparisons, eliminating the need for a duty cycle update register and enabling immediate duty cycle changes without waiting for PWM period completion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If synchronous update of PWM duty cycle values is used, then the PWM generator structure is simple, but control loop lag increases and stability deteriorates
Solution Approach 1:
The patent applies preliminary action by enabling the PWM duty cycle value to be updated in advance before the current PWM cycle completes. The new duty cycle value is loaded into the PWM generator during the current cycle, and will take effect immediately when the counter resets, eliminating the waiting time for the next cycle boundary. This resolves the contradiction by reducing control loop lag while maintaining system stability.
Solution Approach 2:
The patent implements dynamics by allowing the PWM duty cycle to change asynchronously rather than being constrained to synchronous updates at fixed cycle boundaries. The system dynamically adapts the duty cycle value based on control loop requirements, enabling real-time adjustments without waiting for PWM period completion, thus reducing lag while preserving stability through proper comparator logic.
2Reliability
If PWM duty cycle update is delayed until next PWM boundary, then hardware complexity is reduced, but functional accuracy deteriorates due to missed PWM cycles
Solution Approach 1:
The patent extracts the duty cycle update function from the PWM cycle boundary constraint. By separating the duty cycle value loading from the cycle completion event, the system allows duty cycle values to be updated independently and take effect immediately when the counter resets, preventing missed PWM cycles without requiring complex update mechanisms.
Solution Approach 2:
The patent changes the timing parameter of duty cycle updates from synchronous (at PWM boundary) to asynchronous (immediate upon counter reset). This parameter change allows the duty cycle value to be modified at any time, and the new value takes effect as soon as the counter completes its current count and resets, thereby improving PWM cycle accuracy without significantly increasing hardware complexity.
3Reliability
If EQUAL comparison is used between duty cycle value and PWM cycle count, then logic simplicity is improved, but control precision deteriorates due to roll over issues
Solution Approach 1:
The patent inverts the comparison logic from checking when the counter equals the duty cycle value to checking when the counter exceeds the duty cycle value. By using a greater-than comparison instead of an equal-to comparison, the system ensures that the PWM output switches states at the correct moment, preventing roll over issues where the counter might miss the intended duty cycle point due to timing discrepancies.
Data Source
AI summary
A pulse width modulation (PWM) generator having asynchronous updating of its PWM duty cycle and/or period values allows immediate correction for the new PWM duty cycle and/or period values instead of waiting until the end of a PWM period to accept the new duty cycle and/or period values. This reduces the latency in a control loop when responding to changing system status, e.g., changes in PWM duty cycle. Also the PWM duty cycle is prevented from “running away” (e.g., missing a PWM cycle) if the PWM duty cycle timer/counter has advanced beyond an updated duty-cycle maximum value.


