ATE Output Stage Switching With Programmable Current Clamps

The patent applies preliminary action by gradually transitioning the output current from high to low range (or vice versa) before completing the switching between output stages. This gradual transition, controlled by a clamp circuit that limits the rate of change, prevents sudden voltage glitches that would otherwise cause false failure indications or mask actual failures, thereby maintaining testing accuracy while still enabling stage transitions.

The patent applies dynamics by using a programmable clamp circuit that can dynamically adjust the current transition rate. The clamp circuit is configured to limit the rate of change of output current during transitions, and this clamping level can be programmatically adjusted based on the specific testing requirements. This allows optimization of the transition speed to achieve the minimum necessary time while preventing harmful voltage glitches, thus balancing testing accuracy with productivity.

The patent applies universality by implementing a single programmable clamp circuit that serves multiple functions: it controls the transition between high and low current output stages, limits voltage glitches during switching, and can be programmatically adjusted for different testing scenarios. This multi-functional clamp circuit reduces the need for separate control mechanisms for each output stage, thereby managing device complexity while maintaining the ability to cover a wide dynamic range through stage switching.