Auxiliary Memory Cell Pattern Analysis for Fault Isolation
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Solution Overview
Problem
Highly integrated memory devices, such as VLSI SRAM, face challenges in reliable and accurate functional testing due to the difficulty in accessing input/output pins without damaging them, and existing Built-In Self Test (BIST) methods cannot determine which functional block or component is causing failures within the memory device.
Innovation Solution
Incorporating auxiliary memory cells storing fixed values to check the functionality of memory devices, with a method that involves reading output values from these cells to determine malfunctioning and identify the cause of errors through pattern analysis, providing a signal indicative of the malfunctioning component.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard probing methods are used to access input/output pins of highly integrated memory devices, then functional testing can be performed, but the pins may be damaged and direct access to memory matrix terminals is not achieved
Solution Approach 1:
The patent introduces an intermediary testing mechanism that accesses memory cells directly through the memory matrix structure rather than through external I/O pins. This intermediary approach allows functional testing to be performed on the memory array itself, bypassing the need for external pin probing and eliminating the risk of pin damage while maintaining testing reliability.
2Productivity
If BIST machine performs functional test through write and read operations on memory cells, then functional testing can be executed, but the specific malfunctioning component cannot be identified
Solution Approach 1:
The patent segments the functional testing process into distinct phases: write operation testing, read operation testing, and comparison testing. By dividing the testing methodology and analyzing errors in each segment separately, the system can identify which specific functional block (write circuit, read circuit, or memory cell) is malfunctioning, thereby preventing loss of failure location information while maintaining high testing efficiency.
Solution Approach 2:
The patent uses error pattern analysis where different error patterns (analogous to different color codes) indicate different types of failures. By categorizing and analyzing the specific patterns of read errors versus write errors, the system can determine the nature and location of the malfunctioning component, transforming abstract error data into actionable diagnostic information.
3Measurement precision
If conventional functional testing is performed on VLSI memory devices, then general test results can be obtained, but detailed failure analysis requires very long times
Solution Approach 1:
The patent performs preliminary segmentation of the testing process into write-phase testing and read-phase testing, collecting and analyzing error patterns at each stage. By performing this preliminary error categorization during the functional test itself rather than requiring separate detailed analysis later, the system maintains measurement precision while dramatically reducing the time required for failure analysis.
Data Source
AI summary
A method for testing a memory device. The memory device includes a matrix of memory cells having a plurality of rows and columns; the matrix includes a plurality of rows of operative memory cells each one for storing a variable value and at least one row of auxiliary memory cells each one storing a fixed value. The memory device further includes writing circuitry for writing selected values into the operative memory cells, and reading circuitry for reading the values being stored from the operative or auxiliary memory cells. The method includes reading output values from the row of auxiliary memory cells, determining a malfunctioning of the memory device in response to a missing match of the output values with the fixed values, determining a cause of the malfunctioning according to a pattern of reading errors between the output values and the corresponding fixed values, and providing a signal indicative of the cause of the malfunctioning.