Avalanche Photodiode Vertical Guard Ring CMOS Integration
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Solution Overview
Problem
The performance of silicon photomultipliers (SiPMs) in medical imaging applications like PET and SPECT is affected by defects in the active region of avalanche photodiodes, which complicates device fabrication due to incompatibility with standard CMOS processing techniques, and the lateral geometry of guard rings limits diode area efficiency.
Innovation Solution
Implementing a buried n-type isolation layer and vertical electrodes during front-end-of-line processing, with high temperature annealing before CMOS processing, and using polysilicon fill as a field plate to enhance breakdown voltage and reduce leakage, while integrating CMOS readout electronics on the same substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional processing steps such as extra gettering and high temperature annealing are added to reduce defects in the active region, then defect density is reduced, but compatibility with standard CMOS processing techniques deteriorates
Solution Approach 1:
The patent performs high temperature annealing and gettering operations before CMOS processing steps. Specifically, the method includes forming the avalanche photodiode structure and performing high temperature annealing (e.g., 900-1100°C) to reduce defects and perform gettering operations prior to introducing CMOS circuitry, thereby eliminating the need for additional high temperature steps after CMOS fabrication
Solution Approach 2:
The fabrication process is divided into distinct stages: first forming the APD active region with defect reduction treatments, then adding CMOS circuitry in subsequent lower temperature processing steps. This segmentation allows each subsystem to be optimized independently without compromising overall compatibility
2Area of moving object
If the guard ring size is reduced to improve area efficiency, then area efficiency is improved, but breakdown properties and leakage characteristics deteriorate
Solution Approach 1:
The patent transitions from lateral guard ring geometry to vertical guard ring structures. The guard ring is formed as a deep implant or diffusion region extending vertically into the substrate, utilizing the depth dimension rather than lateral spread. This vertical configuration provides effective electrical isolation and breakdown protection while occupying minimal lateral space, thereby maintaining high area efficiency
Solution Approach 2:
The guard ring implementation changes the geometric parameters from lateral dimensions to vertical dimensions. By controlling implant depth, diffusion depth, or etch depth rather than lateral width, the guard ring achieves its function through depth parameter optimization, enabling small lateral footprint with adequate electrical isolation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes the impact on CMOS fabrication, improves diode efficiency, and enhances the robustness of SiPMs by increasing breakdown voltage and reducing dark current, leading to improved performance in detecting low-level light pulses for medical imaging applications.
Implementation Method 1
an avalanche photodetector operatively responsive to an incident optical signal and formed on another portion of the substrate. A light absorbing region and a light responsive region form a p-n junction at the interface therebetween such that when the light absorbing and light responsive regions are appropriately reverse biased, the freed charge carriers in the light absorbing region are amplified by avalanche multiplication
Implementation Method 2
using polysilicon fill as a field plate to enhance breakdown voltage and reduce leakage
Implementation Method 3
high temperature annealing before CMOS processing
Data Source
Figure 1~2
Figure 3
Figure 4~5B
AI summary
A photodiode includes an anode (1202, 1302, 1402) and a cathode (1306, 1406) formed on a semiconductor substrate (402). A vertical electrode (702, 1314, 1414) is in operative electrical communication with a buried component (502, 1312, 1412) of the photodiode. In one implementation, the photodiode is an avalanche photodiode of a silicon photomultiplier. The substrate may also include integrated CMOS readout circuitry (1102).