Back-Gate Biased CMOS Circuits for Cryogenic Temperature Switching
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Solution Overview
Problem
Integrated circuit devices face challenges in maintaining functional operation across distinct temperature ranges, particularly when transitioning from cryogenic mission temperatures to room-temperature test environments, as threshold voltages and carrier mobilities differ significantly, leading to non-functional circuitry due to excessive leakage at room temperature.
Innovation Solution
The implementation of CMOS integrated circuits in silicon-on-insulator substrates with bias-adjustable threshold voltages, using back-gate biasing to shift transistor threshold voltages and maintain target performance metrics across temperature ranges, including the use of dual-temperature-band ICs with on-die bias voltage generators and selector circuits to manage bias voltages based on temperature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If standard CMOS circuits are designed for room temperature operation, then they function correctly at room temperature, but they become non-functional at cryogenic temperatures due to excessive leakage and threshold voltage mismatches
Solution Approach 1:
The patent implements dynamically adjustable threshold voltages for PMOS and NMOS transistors using back-gate biasing. Bias voltage generators produce temperature-dependent bias voltages that are applied to the back gates of transistors, allowing the threshold voltages to be adjusted in real-time based on operating temperature. This dynamic adjustment enables the circuit to maintain proper voltage levels and functionality across both room temperature and cryogenic temperature ranges.
Solution Approach 2:
The patent changes the threshold voltage parameter of transistors based on operating temperature. At room temperature, higher threshold voltages are maintained to prevent excessive leakage, while at cryogenic temperatures, lower threshold voltages are applied to ensure proper switching operation. This is achieved through back-gate biasing where bias voltages are applied to the back gates of PMOS and NMOS transistors to adjust their threshold voltages according to the operating temperature range.
2Reliability
If threshold voltages are lowered to improve cryogenic operation, then circuit functionality improves at low temperatures, but leakage increases at room temperature
Solution Approach 1:
The patent implements dynamically adjustable threshold voltages for PMOS and NMOS transistors using back-gate biasing. Bias voltage generators produce temperature-dependent bias voltages that are applied to the back gates of transistors, allowing the threshold voltages to be adjusted in real-time based on operating temperature. This dynamic adjustment enables the circuit to maintain proper voltage levels and functionality across both room temperature and cryogenic temperature ranges.
Solution Approach 2:
The patent changes the threshold voltage parameter of transistors based on operating temperature. At room temperature, higher threshold voltages are maintained to prevent excessive leakage, while at cryogenic temperatures, lower threshold voltages are applied to ensure proper switching operation. This is achieved through back-gate biasing where bias voltages are applied to the back gates of PMOS and NMOS transistors to adjust their threshold voltages according to the operating temperature range.
3Reliability
If separate circuits are designed for different temperature ranges, then each circuit optimizes for its specific temperature, but device complexity increases
Solution Approach 1:
The patent implements a universal digital circuit design that can operate across both room temperature and cryogenic temperature ranges by using back-gate biasing technology. The same circuit architecture serves multiple temperature ranges, eliminating the need for separate room-temperature and cryogenic circuits. Bias voltage generators provide temperature-appropriate bias voltages to the back gates of transistors, allowing a single circuit design to adapt to different operating conditions.
Solution Approach 2:
The patent implements dynamically adjustable threshold voltages for PMOS and NMOS transistors using back-gate biasing. Bias voltage generators produce temperature-dependent bias voltages that are applied to the back gates of transistors, allowing the threshold voltages to be adjusted in real-time based on operating temperature. This dynamic adjustment enables the circuit to maintain proper voltage levels and functionality across both room temperature and cryogenic temperature ranges.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables bias-controlled digital delay with fixed run-time supply voltages, reducing power consumption and maintaining circuit functionality across both cryogenic and room-temperature environments by adjusting threshold voltages and supply voltages accordingly, thereby optimizing performance and power efficiency.
Implementation Method 1
using back-gate biasing to shift transistor threshold voltages and maintain target performance metrics across temperature ranges
Data Source
AI summary
During operation of an IC component within a first range of temperatures, a first bias voltage is applied to a first substrate region disposed adjacent a first plurality of transistors to effect a first threshold voltage for the first plurality of transistors. During operation of the IC component within a second range of temperatures that is distinct from and lower than the first range of temperatures, a second bias voltage is applied to the first substrate region to effect a second threshold voltage for the first plurality of transistors that is at least as low as the first threshold voltage.