Back Gate Isolation in High Voltage Semiconductor Devices
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Solution Overview
Problem
In semiconductor devices with a back gate region, the proximity between the back gate and the transistor body can lead to a short circuit and a decrease in on-state breakdown voltage, hindering normal device operation due to the lack of a potential difference between the source and back gate regions.
Innovation Solution
A semiconductor device structure is implemented with a well region of a first conductivity type, including a source region, a drain region, and a third impurity region for potential extraction, along with a gate electrode or insulating film for isolation, which reduces the influence on high voltage tolerant transistors and suppresses parasitic bipolar transistor operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the distance between the back gate region and the transistor main body is made small, then the work of the parasitic bipolar transistor is suppressed and the decrease in on-state breakdown voltage is suppressed, but a short circuit between the source region and the back gate region is likely to occur
Solution Approach 1:
An insulating film is introduced as an intermediary between the source region and the back gate region. This insulating film allows the regions to be in close proximity for suppressing parasitic bipolar transistor work while preventing direct electrical contact that would cause short circuits. The insulating film acts as a mediator that enables both close spacing and electrical isolation simultaneously.
Solution Approach 2:
The space between the source region and the back gate region is segmented by introducing an insulating film. This segmentation divides the continuous space into electrically isolated zones, allowing the regions to be positioned close together physically while maintaining electrical separation. The segmentation enables close spacing without direct contact.
2Device complexity
If a back contact structure is used to form the back gate region, then the structure is simplified, but a potential difference cannot be provided between the source region and the back gate region
Solution Approach 1:
The insulating film is selectively applied only in specific regions where electrical isolation is needed, rather than uniformly across the entire device. This local application maintains the simplified back contact structure in areas where it is beneficial while introducing isolation only where required to prevent short circuits and maintain potential differences.
Data Source
AI summary
A semiconductor device is provided, in which work of a parasitic bipolar transistor can be suppressed and a potential difference can be provided between a source region and a back gate region. A high voltage tolerant transistor formed over a semiconductor substrate includes: a well region of a first conductivity type; a first impurity region as the source region; and a second impurity region as a drain region. The semiconductor device further includes a third impurity region and a gate electrode for isolation. The third impurity region is formed, in planar view, between a pair of the first impurity regions, and from which a potential of the well region is extracted. The gate electrode for isolation is formed over the main surface between the first impurity region and the third impurity region.