Back-Gate P-N Junction Layout for Low-Loss RF Transistors

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Solution Overview

Problem

Conventional transistor structures in integrated circuits face a tradeoff between back-gate controllability and capacitive losses in the substrate material, particularly in RF devices with back-gate biasing, leading to signal loss due to low resistivity materials.

Innovation Solution

The implementation of a back-gate region with oppositely doped semiconductor regions, forming P-N junctions, which reduces capacitive losses while maintaining control over the transistor's threshold voltage through back-gate biasing, by using a pair of doped semiconductor regions with lengths extending substantially in parallel with the gate structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If conventional transistor structures with back-gate biasing are used, then control over the transistor's threshold voltage is achieved, but capacitive losses in the substrate material increase significantly

Engineering Contradiction:
Improveback-gate controllabilityVSAvoidcapacitive losses
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The back-gate region is segmented into multiple oppositely doped semiconductor regions (first doped region with first doping type, second doped region with second doping type) arranged in alternating sequence. This segmentation creates multiple P-N junctions that divide the capacitive coupling path, reducing the overall capacitive loss while maintaining the back-gate control function. Each segmented region contributes to threshold voltage control through its P-N junction, collectively achieving both low loss and effective control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the doping type parameter of the semiconductor regions in the back-gate, alternating between first doping type and second doping type. This parameter change creates P-N junctions with different electrical characteristics that reduce capacitive coupling between the back-gate and substrate. The alternating doping parameters enable the structure to maintain voltage control capability while minimizing capacitive losses.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If low resistivity substrate materials are used, then device scaling and integration are improved, but signal loss increases due to capacitive coupling

Engineering Contradiction:
Improvedevice scalingVSAvoidsignal loss
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The oppositely doped semiconductor regions act as intermediary elements between the back-gate and the substrate. These intermediary regions with alternating doping types create P-N junctions that mediate the electrical interaction, reducing direct capacitive coupling between the back-gate and low resistivity substrate. This allows device scaling with low resistivity materials while minimizing signal loss through the intermediary P-N junction structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration achieves a significant reduction in capacitive losses, approximately 50% reduction in back-gate to gate capacitance, and allows for effective control of the threshold voltage, enhancing performance in power amplification and switching applications.

Implementation Method 1

the back-gate region including a pair of doped semiconductor materials with a P-N junction therebetween

Methodology Applied
Scientific EffectP-N junction: Diode

Data Source

PatentUS20240170576A1Structure with back-gate having oppositely doped semiconductor regions
Publication Date: 2024.05.23 GLOBALFOUNDRIES US INC
  • US20240170576A1 patent drawing
  • US20240170576A1 patent drawing
  • US20240170576A1 patent drawing

AI summary

Embodiments of the disclosure provide a structure with a back-gate having oppositely doped semiconductor regions. The structure may include a transistor over a substrate. The transistor includes a gate structure having a gate length. A back-gate region is within the substrate below the gate structure of the transistor. The back-gate region includes a pair of doped semiconductor regions with a P-N junction therebetween. Each of the pair of semiconductor materials has a length extending substantially in parallel with respect to the gate length.