Back-Gate Switching Circuit for Low-Power Product-Sum Operation
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Solution Overview
Problem
As the complexity and size of artificial neural networks increase, they face challenges with high power consumption and heat generation, which can affect the performance and reliability of circuit components, particularly as they are less tolerant to ambient temperature variations.
Innovation Solution
A semiconductor device is designed with a hierarchical artificial neural network architecture that includes specific transistor configurations and inverter circuits, along with holding units and switching circuits, to manage signal transmission and processing efficiently, reducing power consumption and temperature sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of circuits corresponding to neurons and synapses increases to enhance the scale and complexity of the artificial neural network, then the computational capability and processing power are improved, but the power consumption and heat generation increase significantly
Solution Approach 1:
The patent divides the artificial neural network into multiple layers (input layer, hidden layers, output layer) with neurons organized in hierarchical structures. Each neuron circuit is segmented into distinct functional components (synaptic weight circuits, activation function circuits, summation circuits) that can be independently optimized. This segmentation allows the system to achieve high computational capability through modular organization while managing power consumption at the component level.
Solution Approach 2:
The patent implements periodic action through the sequential processing architecture where neurons in each layer are activated in discrete time steps or cycles. The forward propagation process operates periodically, with input signals being processed layer by layer in a rhythmic manner. This periodic operation allows for efficient resource utilization and reduces instantaneous power demands compared to continuous parallel processing of all neurons simultaneously.
2Productivity
If the number of circuits corresponding to neurons and synapses increases to enhance the scale of the artificial neural network, then the computational capability is improved, but the amount of heat generation increases and affects circuit component characteristics
Solution Approach 1:
By segmenting the neural network into spatially distributed layers and neurons, the patent distributes heat generation across multiple localized regions rather than concentrating it in a single high-density processing unit. Each neuron circuit generates heat locally, but the distributed architecture allows for better thermal management through spatial separation, reducing the overall temperature impact on any single circuit component.
Solution Approach 2:
The patent introduces intermediary elements such as activation function circuits and summation circuits that act as buffers between synaptic weight circuits and output neurons. These intermediary components distribute and regulate signal flow, thereby distributing and regulating heat generation patterns. The intermediary structures allow thermal energy to be dispersed across additional circuit elements, reducing peak temperatures and minimizing the impact on critical circuit characteristics.
3Productivity
If the number of layers and neurons in the artificial neural network increases, then the number of connection strengths and parameters increases, but the amount of calculation becomes enormous and exacerbates power consumption
Solution Approach 1:
The patent segments the large-scale neural network into manageable layers, with each layer containing a specific number of neurons and connection strengths. This hierarchical segmentation transforms an overwhelming monolithic structure into organized, modular units that can be designed, analyzed, and optimized independently. The segmentation principle allows the system to handle large numbers of circuits by organizing them into structured layers, making the overall complexity tractable while maintaining high processing power.
Solution Approach 2:
The patent addresses complexity by transitioning from a flat, two-dimensional view of neural networks to a multi-dimensional hierarchical structure with multiple layers stacked vertically. This dimensional change allows the system to organize neurons and connections in three-dimensional space, enabling efficient routing and reduced interconnection complexity. By adding the layer dimension, the patent can manage enormous numbers of parameters through structured organization rather than random connectivity, reducing the practical complexity of implementation.
Data Source
AI summary
A semiconductor device that can perform product-sum operation with low power is provided. The semiconductor device includes a switching circuit. The switching circuit includes first to fourth terminals. The switching circuit has a function of selecting one of the third terminal and the fourth terminal as electrical connection destination of the first terminal, and selecting the other of the third terminal and the fourth terminal as electrical connection destination of the second terminal, on the basis of first data. The switching circuit includes a first transistor and a second transistor each having a back gate. The switching circuit has a function of determining a signal-transmission speed between the first terminal and one of the third terminal and the fourth terminal and a signal-transmission speed between the second terminal and the other of the third terminal and the fourth terminal on the basis of potentials of the back gates. The potentials are determined by second data. When signals are input to the first terminal and the second terminal, a time lag between the signals output from the third terminal and the fourth terminal is determined by the first data and the second data.


