Back-Gate Modulated Wordline Driver Circuit for DRAM
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Solution Overview
Problem
Conventional wordline driver circuits for DRAM memory cells are bulky and area-consuming, leading to integration issues and high power consumption, particularly due to the need for high voltage support and complex transistor structures.
Innovation Solution
A compact wordline driver circuit is developed using a semiconductor-on-insulator substrate with transistors configured in series, featuring back control gates that modulate threshold voltage, allowing for efficient power supply and reduced component count, enabling the circuit to provide logic functions like NOR and NAND.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional wordline driver circuits are used to provide high voltage for DRAM memory cells, then the threshold voltage requirement is met, but the circuit area becomes excessively large
Solution Approach 1:
The patent introduces a back gate dimension beneath the channel, allowing voltage control from a second spatial dimension. This enables threshold voltage modulation without increasing the planar footprint of the transistor, directly resolving the contradiction between maintaining high voltage capability and reducing circuit area.
Solution Approach 2:
The patent dynamically changes the threshold voltage parameter by applying different voltages to the back gate. This allows the same physical transistor structure to operate at different threshold voltages as needed, eliminating the need for multiple transistor types or larger circuits to handle different voltage requirements.
2Reliability
If conventional wordline driver circuits with high voltage support are implemented, then memory cell access is enabled, but power consumption increases significantly
Solution Approach 1:
The back gate voltage can be dynamically adjusted to change the threshold voltage parameter. During read operations requiring high voltage, the back gate is biased appropriately. During standby or low-power modes, the back gate voltage can be reduced or eliminated, significantly lowering power consumption while maintaining memory cell access capability when needed.
Solution Approach 2:
The patent makes the threshold voltage dynamic rather than fixed, allowing the circuit to adapt its power consumption characteristics based on operational requirements. The back gate voltage can be modulated in real-time to optimize the balance between performance and power consumption.
3Power
If conventional wordline driver circuits are used, then high voltage drive capability is achieved, but device complexity and stacking requirements increase
Solution Approach 1:
By adding the back gate dimension, the patent achieves high voltage drive capability within the same planar footprint without requiring complex stacking of multiple transistor layers. The vertical back gate control provides the additional voltage capability without increasing horizontal circuit complexity or requiring staggered multi-layer configurations.
4Reliability
If transistors with high threshold voltage are used to reduce leakage, then information retention is improved, but the voltage required to make them conducting increases
Solution Approach 1:
The patent makes the threshold voltage dynamic through back gate control. During standby mode, a high threshold voltage is maintained to minimize leakage and preserve information. During active read/write operations, the back gate voltage is adjusted to lower the threshold voltage, enabling the transistor to conduct at lower gate voltages and reducing the voltage swing requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a compact, low-power consumption circuit that reduces the size and complexity of wordline driver circuits, facilitating integration and reducing the need for stacking techniques, while maintaining efficient operation and logic functionality.
Implementation Method 1
Each transistor has a back control gate formed in the base substrate below the channel of the transistor and capable of being biased in order to modulate the threshold voltage of the transistor
Implementation Method 2
a thin layer of semiconducting material separated from a base substrate by an insulating layer
Data Source
AI summary
A circuit made on a semiconductor-on-insulator substrate. The circuit includes a first transistor having a first channel, a second transistor having a second channel, with the transistors provided in serial association between first and second terminals for applying a power supply potential, each of the transistors comprising a drain region and a source region in the thin layer, a channel extending between the source region and the drain region, and a front control gate located above the channel. Each transistor has a back control gate formed in the base substrate below the channel of the transistor and capable of being biased in order to modulate the threshold voltage of the transistor. At least one of the transistors is configured for operating in a depletion mode under the action of a back gate signal which will sufficiently modulate its threshold voltage.