Back-Side Contact Formation via TSV in Semiconductor Packaging
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Solution Overview
Problem
The semiconductor packaging industry faces increased complexity and costs due to the need for different die layouts with either front-side or back-side contacts, which complicates production and limits the versatility of semiconductor devices.
Innovation Solution
A semiconductor die is reconfigured post-fabrication to include both front-side and back-side contacts by forming a via stack through the wiring and dielectric layers, allowing for electrical isolation and connection between the circuit and the contacts, enabling the same batch of dice to be used in various applications with different contact configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different die layouts with different contacts are fabricated for different applications, then adaptability to various applications is improved, but device complexity and production costs increase
Solution Approach 1:
The patent implements a universal die layout where identical semiconductor dice can be configured for different applications through post-fabrication reconfiguration. The same die structure with standardized wiring layers and dielectric layers can serve multiple applications by selectively forming or removing contact structures, eliminating the need to fabricate different die layouts for different applications.
Solution Approach 2:
The patent introduces dynamic reconfigurability to the semiconductor die after fabrication. Contact structures can be selectively formed or removed based on the intended application, allowing the die to adapt its functionality dynamically. This post-fabrication flexibility enables the same batch of dice to be used in various applications without increasing production complexity.
2Adaptability or versatility
If different die layouts with different contacts are fabricated for different applications, then adaptability to various applications is improved, but manufacturing costs increase
Solution Approach 1:
The patent implements a universal die layout where identical semiconductor dice can be configured for different applications through post-fabrication reconfiguration. The same die structure with standardized wiring layers and dielectric layers can serve multiple applications by selectively forming or removing contact structures, eliminating the need to fabricate different die layouts for different applications.
Solution Approach 2:
The patent performs preliminary preparation during fabrication by creating a standardized die structure with wiring layers and dielectric layers that are designed to accommodate multiple contact configurations. This preliminary setup enables cost-effective post-fabrication reconfiguration, as the base structure is already optimized for versatility without requiring additional fabrication steps for each application.
3Reliability
If through silicon vias are formed through traditional methods, then electrical connection through the substrate is achieved, but uneven etching and deposition issues occur
Solution Approach 1:
The patent segments the through-silicon via formation process into multiple discrete steps: forming via holes through the substrate, depositing insulating material in the via holes, and selectively plating conductive material. This segmentation allows each step to be optimized independently, improving etching uniformity and deposition quality while maintaining reliable electrical connections.
Solution Approach 2:
The patent introduces an insulating material as an intermediary layer within the through silicon vias. This intermediary layer serves multiple functions: it provides electrical isolation between different conductive paths, enables selective plating of conductive material, and improves the overall uniformity of the via formation process by creating distinct zones for different materials.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies manufacturing, reduces costs, and enhances versatility by allowing identical semiconductor dice to be used in multiple applications, while avoiding the challenges of uneven etching and deposition issues in traditional through silicon via formation.
Implementation Method 1
The TSV includes a metal plated, tapered via formed through the substrate. The TSV is electrically connected to the wire formed on the passivation layer.
Data Source
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AI summary
In one embodiment, a semiconductor is provided comprising a substrate (202) and a plurality of wiring layers (302) and dielectric layers (304) formed on the substrate, the wiring layers implementing a circuit. The dielectric layers separate adjacent ones of the plurality of wiring layers. A first passivation layer (402) is formed on the plurality of wiring layers. A first contact pad (404) is formed in the passivation layer and electrically coupled to the circuit. A wire (610) is formed on the passivation layer and connected to the contact pad. A through silicon via (TSV) (502) is formed through the substrate, the plurality of wiring and dielectric layers, and the passivation layer. The TSV is electrically connected to the wire formed on the passivation layer. The TSV is electrically isolated from the wiring layers except for the connection provided by the metal wire formed on the passivation layer.