Back Side Via Vertical Output Couplers for Wafer-Level Light Extraction
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Solution Overview
Problem
On-wafer, in-line testing of output light power and spectrum of Photonic Integrated Circuits (PICs) is challenging due to the difficulty in measuring or extracting light from waveguides without diverting it from the wafer surface, especially for wide spectral band applications.
Innovation Solution
A method is developed to form a vertical output coupler by etching the waveguide material to create a tilted plane and coating it with reflective metal, allowing light to be reflected upwardly through an index matching material, enabling light extraction from waveguides while maintaining the PICs in wafer form.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If light is routed in the plane of the wafer through waveguides, then photonic integrated circuits can be manufactured using wafer-based microelectronic processes, but it is difficult to measure or extract such light for testing purposes while PIC chips are still in wafer form
Solution Approach 1:
The patent introduces a vertical dimension to light extraction by creating tilted planes (e.g., at 45 degrees) within the waveguide structure. These tilted planes redirect horizontally propagating light into the vertical direction, allowing light to exit the wafer surface for testing while maintaining the integrity of the wafer-based manufacturing process. This dimensional transformation resolves the contradiction by enabling both in-plane light routing and out-of-plane light extraction.
2Difficulty of detecting and measuring
If a tilted mirror is formed by coating a tilted plane with reflective metal, then light can be reflected upwardly for extraction, but the manufacturing process becomes more complex
Solution Approach 1:
The patent modifies the geometric parameters of the waveguide structure by introducing tilted planes with specific angles (e.g., 45 degrees). This geometric parameter change enables efficient light redirection without requiring complex additional components. The tilted plane angle is carefully selected to optimize light extraction efficiency while maintaining compatibility with standard manufacturing processes, thus resolving the contradiction between extraction capability and manufacturing complexity.
3Loss of energy
If index matching material is deposited into the space between the waveguide and tilted mirror, then reflection and scattering losses are reduced, but the manufacturing process requires additional deposition steps
Solution Approach 1:
The patent introduces index matching material as an intermediary substance between the waveguide and the tilted mirror. This intermediary material has a refractive index that bridges the optical impedance mismatch between the two structures, thereby reducing reflection and scattering losses. Although this adds a deposition step to the manufacturing process, the use of standard semiconductor deposition techniques keeps the added complexity manageable while significantly improving optical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for efficient light extraction and testing of PICs with reduced reflection and scattering losses, enabling cost-effective manufacturing and improved testing capabilities without the need for costly chip-level polishing.
Implementation Method 1
coating the first tilted plane with a reflective metal to form a tilted mirror, and depositing an index matching material into the space between the unetched portion of the waveguide and the tilted mirror. Light propagating through the waveguide into the space continues through the index matching material to the tilted mirror, and the tilted mirror reflects the light upwardly.
Data Source
AI summary
A method forms a vertical output coupler for a waveguide, formed of waveguide material and disposed within a layer stack on a top surface of a wafer. The method includes etching through a portion of the wafer to form a via that exposes the waveguide material, and etching the waveguide material to remove at least a first portion of the waveguide. The etching forms a tilted plane in the waveguide material. The method further includes coating the first tilted plane with one or more reflective layers, to form a tilted mirror in contact with the first tilted plane in the waveguide material. The tilted mirror forms the vertical output coupler such that light propagating through the waveguide is deflected by the tilted mirror, and exits the waveguide.