Back-to-Back Stacked Semiconductor Package Structure
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Solution Overview
Problem
The existing 3D stacked package structure for semiconductor devices faces challenges in reducing overall height, leading to limitations in miniaturization and wiring space, as well as mutual interference between circuit layouts due to the orientation and placement of dies and wires.
Innovation Solution
The package structure employs a back-to-back stacking method where the first and second dies are oriented in opposite directions relative to a common conductive layer, allowing for independent fan-in/fan-out circuit layouts below and above the conductive layer, respectively, using blind hole pillars and conductive structures for signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the sensor die is connected on the active surface of the controller die using conventional 3D stacking, then the dies can be integrated in a single package, but the active surface area is occupied which quizzes the space for wire setting and circuit layout
Solution Approach 1:
The patent inverts the conventional stacking approach by connecting the back surface of the sensor die to the active surface of the controller die, rather than connecting active surfaces directly. This inversion allows wire bonding to be performed on the exposed active surface of the sensor die without obstruction, while still achieving 3D integration and reduced package volume.
Solution Approach 2:
The patent utilizes the vertical dimension (Z-axis) more effectively by stacking dies in three dimensions with wire bonds extending vertically between layers. This dimensional approach allows circuit layout in the horizontal plane (X-Y axis) to proceed without interference from wire routing, as wires occupy the vertical space above and below the active surfaces.
2Volume of moving object
If the active surfaces of two dies are oriented toward the same direction, then the dies can be stacked vertically, but the circuit layout of wires must plan in the same direction which causes mutual interference
Solution Approach 1:
The patent orients the active surfaces of the two dies in opposite directions (one upward, one downward), allowing wire bonds to extend in opposite vertical directions from each active surface. This eliminates mutual interference between circuit layouts, as the wire routing paths are spatially separated in the vertical dimension rather than competing in the same plane.
3Reliability
If wire bonding is used to connect the dies, then signal transmission between dies is enabled, but the wires have certain height which increases the overall height of the package structure
Solution Approach 1:
The patent accepts the vertical height of wire bonds as necessary for enabling signal transmission between stacked dies, but optimizes the horizontal footprint by allowing wire routing to occur in the vertical dimension rather than consuming horizontal active surface area. This separates the concerns of signal transmission (vertical wire connections) from circuit layout (horizontal trace routing).
Data Source
AI summary
A package structure for a semiconductor device includes a first conductive layer, a second conductive layer, a first die, a second die, a plurality of first blind via pillars and a conductive structure. The first conductive layer has a first surface and a second surface. The first die and the second die respectively have an active surface and a back surface, which are disposed opposite to each other. There is a plurality of metal pads disposed on the active surface. The first die is attached to the first surface of the first conductive layer with its back surface, and the second die is attached to the second surface of the first conductive layer with its back surface. The first and second conductive layers, the first and second dies, the first blind hole pillars and conductive structure are covered by a dielectric material.