Back-Trench Isolation Structure for Dark Current Passivation
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Solution Overview
Problem
CMOS image sensors suffer from performance degradation due to dark current and white pixel issues caused by defects in the semiconductor substrate, which are not adequately passivated by existing high-k dielectric materials.
Innovation Solution
An image sensor integrated chip (IC) with a back-trench isolation (BTI) structure incorporating a conductive core that is electrically coupled to interconnects and biased to generate an electric field, accumulating holes along the substrate sidewalls to passivate defects and improve isolation and quantum efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional high-k dielectric materials are used to passivate defects, then defect passivation is improved, but manufacturing complexity and cost increase due to additional dielectric layers
Solution Approach 1:
The patent extracts the essential function of defect passivation from complex multi-layer dielectric structures and implements it through a simplified single-layer dielectric structure combined with a conductive core. The conductive core is coupled to a biasing source that generates an electric field to accumulate holes along substrate sidewalls, achieving passivation without requiring additional high-k dielectric layers.
Solution Approach 2:
The patent changes the electrical parameter state by introducing a conductive core with bias voltage to create an electric field that actively accumulates holes for passivation, rather than relying solely on the material properties of multiple dielectric layers. This parameter-based approach (electrical field control) replaces the material-based approach (stacked dielectric layers).
2Reliability
If additional high-k dielectric layers are added to improve defect passivation, then passivation effectiveness is improved, but fabrication cost increases
Solution Approach 1:
The patent removes the need for additional high-k dielectric layers by extracting the core passivation function and implementing it through a conductive core with bias voltage that generates an electric field for hole accumulation. This reduces fabrication steps and material costs while maintaining passivation effectiveness.
Solution Approach 2:
The patent uses a cost-effective single-layer dielectric structure combined with a conductive core instead of expensive multi-layer high-k dielectric structures. The conductive core and biasing source provide a lower-cost alternative to additional dielectric material deposition and processing steps.
3Reliability
If a conductive core with bias voltage is used to generate electric field, then defect passivation is improved, but device complexity increases due to biasing source and interconnects
Solution Approach 1:
The conductive core serves multiple functions: it acts as part of the isolation structure, provides a pathway for bias voltage application, and generates the electric field for hole accumulation and defect passivation. The biasing source and interconnect structure also serve dual purposes by providing both electrical connection and field generation functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces dark current and enhances the modulation transfer function and quantum efficiency of the image sensor IC, while also reducing fabrication costs by eliminating the need for additional absorption enhancement layers on the substrate sidewalls.
Implementation Method 1
Incorporating a conductive core within the dielectric structure of the isolation trench, coupled to interconnects and a biasing source, generates an electric field that accumulates holes along the substrate sidewalls
Data Source
AI summary
The present disclosure relates to an image sensor integrated chip (IC). The image sensor IC includes one or more interconnects arranged within an inter-level dielectric (ILD) structure on a first side of a substrate. An image sensing element is arranged within the substrate. Sidewalls of the substrate form one or more trenches extending from a second side of the substrate to within the substrate on opposing sides of the image sensing element. A dielectric structure is arranged on the sidewalls of the substrate that form the one or more trenches. A conductive core is arranged within the one or more trenches and is laterally separated from the substrate by the dielectric structure. The conductive core is electrically coupled to the one or more interconnects.