Display Backplane Filling Layer for Alignment Mark Recognition

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In the preparation of organic light-emitting diode display devices, recessed areas on the substrate near alignment marks can hinder the recognition of these marks during the module process, leading to poor alignment.

Innovation Solution

A display backplane with a filling layer that fills at least part of the recessed areas on the substrate, ensuring a minimum distance of less than 200 μm between the recessed area and the alignment mark projection, allowing accurate identification and alignment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the substrate surface has a recessed area near the alignment mark, then the substrate can accommodate structural features, but the alignment mark cannot be recognized during the module process

Engineering Contradiction:
Improvesubstrate structure flexibilityVSAvoidalignment mark recognition
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The invention extracts the problematic recessed area from the alignment mark region by filling it with a filling layer. This separates the structural accommodation function (handled by the filling layer) from the alignment mark recognition function (handled by the flat substrate surface), allowing both requirements to be satisfied simultaneously.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The filling layer acts as an intermediary element that fills the recessed area, creating a flat surface that enables alignment mark recognition while preserving the underlying structural features. The filling layer mediates between the conflicting requirements of structural flexibility and alignment precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If the recessed area is filled to improve alignment mark recognition, then alignment precision improves, but the substrate thickness increases

Engineering Contradiction:
Improvealignment precisionVSAvoidsubstrate thickness
Core Design Contradiction:
Manufacturing precisionVSLength of stationary object

Solution Approach 1:

The filling layer is applied locally only to the recessed area rather than uniformly across the entire substrate. This localized approach restores the flat surface needed for alignment mark recognition without adding significant overall thickness to the substrate, thus resolving the contradiction between alignment precision and substrate thickness.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If the filling layer is applied to fill the recessed area, then the alignment mark can be recognized, but the process complexity increases

Engineering Contradiction:
Improvealignment mark recognitionVSAvoidmanufacturing process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The invention changes the surface topology parameter of the substrate by filling the recessed area, transforming it from a non-planar to a planar surface. This parameter change enables alignment mark recognition while the filling process itself is integrated into the existing manufacturing workflow, minimizing additional process complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11258016B2Display backplane, method for preparing the same, and display device
Publication Date: 2022.02.22 ORDOS YUANSHENG OPTOELECTRONICS
  • US11258016B2 patent drawing
  • US11258016B2 patent drawing
  • US11258016B2 patent drawing

AI summary

The present disclosure provides a display backplane, a method for preparing the same, and a display device. The display backplane includes a substrate, an electronic device and an alignment mark arranged on the substrate, and a filling layer, the filling layer being filled in at least a part of a recessed area located on a surface of the substrate away from the electronic device, and a minimum distance between an orthogonal projection of the at least part of the recessed area on the substrate and an orthogonal projection of the alignment mark on the substrate being less than 200 μm.