Solid-State Devices TRIZ Cases

A group III nitride light-emitting device uses a nonpolar semiconductor layer with a mirror surface on the light extraction side to extract polarized light.

Reconstituting singulated dies with molding compound enables wafer-to-wafer bonding of dissimilar semiconductor components.

A semiconductor light-emitting device uses a dot-like metallic layer beneath a reflective ohmic metal layer to lower driving voltage.

Concave lower patterns buffer excessive etching damage, preserving electric characteristics during high-density 3D memory fabrication.

Segmented support structures minimize contact area to reduce particle and moisture adherence, lowering wafer defects during transport.

Segmented passivation thickness improves viewing angles while preventing short circuits between electrodes.

Segmenting large OLED substrates into smaller units enables precise fine metal mask deposition without gravitational distortion.

A side-view light emitting device uses a concave cavity and spacer to direct optical output.

Ferromagnetic shielding redirects external magnetic fields away from SOT MRAM cells, preventing erroneous writing in neighboring memory units.

A digital X-ray detector assembly integrates front and rear shock absorbing structures with a support panel to protect internal components.

Segmented electrode layers with insulated connectors reduce noise interference and improve touch sensing accuracy.

A reflective structure redirects light from the OLED device to increase the emitting area and extraction rate.

An OLED display panel integrates optical fingerprint recognition by embedding sensing modules within pixel units.

A pattern forming method uses a light-shielding layer to reflect exposure light, enhancing wettability contrast for precise ink deposition.

Alternating aluminum nitride and III-N layers engineer strain while a rare earth oxide buffer protects the silicon substrate from reactive process gases.

Microcracks in the cover film allow decomposition products to escape and maintain oxygen supply, preventing discoloration while enhancing durability.

Selective vapor phase etching reduces first electrode layer thickness to increase memory cell capacitance without raising manufacturing complexity.

Staggered bank positions in an applied-material separation layer prevent color mixture of adjacent subpixels during inkjet deposition.

A vertical cell string structure forms conductive layers via metal filling and annealing to enhance conductivity.

A back-illuminated image sensor uses a trench-formed air gap and metal reflection pattern to redirect light toward photodiodes.

Patterned induction layers create non-uniform crystallinity in polysilicon, improving TFT performance while reducing leakage current.

Segments power supply networks and groups cells by resistance characteristics to reduce timing violations caused by dynamic voltage fluctuations.

Segmented OLED common electrodes reduce resistance via breakdown voltage removal, lowering power consumption.

Second P-type semiconductor layers surround photodiodes to prevent leak currents during chip dicing.

A light-emitting unit integrates a gas sensor and micro pump to actively remove volatile organic compounds from the silicone dome.

A black matrix forms on an OLED array substrate by activating light emitting devices to expose photoresist material.

A pixel arrangement structure uses a virtual rhombus configuration to reduce sub-pixel count.

Tapered conductive structures reduce reverse current leakage before breakdown voltage, improving electrical characteristics and reliability.

Stepped holes in array substrate insulation layers reduce internal stress on metal lines, preventing broken connections during lapping.

Variable elasticity sealant prevents moisture ingress and maintains sealing integrity during repeated folding cycles.

An amorphous semiconductor layer interposed between electrodes and a switching layer enhances device reliability.

A polarizing layer through hole directs light to an under-screen camera module without punching the full display stack.

Silicon carbide semiconductor device with controlled p-type regions in the edge termination structure.

Integral field emitter protrusions on a silicon substrate enhance electron escape efficiency while a pure boron layer prevents oxidation.

A filling layer fills recessed areas on a display backplane substrate to create a flat surface for alignment mark identification.

Through-silicon vias enable direct memory access, allowing rate calculation circuitry to match processing speeds to data supply and eliminate idle wait times.

Impurity-doped electron transit layer suppresses short-channel effects in nitride semiconductor devices.

A patterned spacer layer protects photodiodes from implantation damage, reducing dark current and white pixel defects in CMOS image sensors.

A two-step gap-fill process deposits insulator layers in memory cell stacks using distinct precursor ratios to ensure complete void-free filling.

Graded hydrophilicity in the bent region prevents moisture ingress into OLED wiring lines, resolving the flexibility-reliability trade-off.

A pixel-based photovoltaic cell array uses internal switches to dynamically configure cells for energy conversion or imaging.

Self-healing polymer layers repair microcracks in flexible display encapsulation, preventing water vapor ingress and extending device lifespan.

Stacking semiconductor layers vertically reduces planar area occupancy while maintaining high breakdown voltage.

A driving thin film transistor uses a composite semiconductor layer to stabilize electrical parameters.

Selective deposition creates nickel oxide layers for memory cells, eliminating chemical etching steps that increase fabrication complexity and costs.

Segmenting decoder circuits by withstand voltage resolves the trade off between reliability and read speed.

A light-emitting device design controls distance differences between elements to minimize counter electrode unevenness.

Sonic-assisted seedless copper electroplating eliminates sacrificial layers to achieve 160 milli-ohm resistance and minimize parasitic capacitance.

An intermediate adhesive layer bonds bottom electrodes to insulating films, preventing peeling during heat treatment and reducing leakage current.

A sensory processing system uses diffusive coupling to generate difference of Gaussians spatial response sensitivity.