Capacitor Electrode Thickness Reduction via Selective Vapor Etching
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Solution Overview
Problem
The capacitance of memory cell capacitors in semiconductor devices is insufficient, which can lead to malfunctioning or failure of electrical devices, necessitating a method to increase capacitance.
Innovation Solution
A method involving a substrate and multilayer structure, where a recess is formed, a first electrode layer is deposited, followed by selective etching to remove stack material layers, and a dielectric layer is inserted between the electrode layers, using specific materials like borophosphosilicate glass and tetraethyl orthosilicate, and a selective vapor phase etching treatment with fluorine compounds to reduce the first electrode layer thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the capacitance of memory cell capacitor is increased to support electrical devices' multifunction, then the device functionality is improved, but the manufacturing complexity and process difficulty increase
Solution Approach 1:
The manufacturing process is divided into multiple selective etching steps, each targeting specific material layers (first stack material layer, second stack material layer) with different etching conditions and gases, allowing precise control over the capacitor structure formation while managing process complexity
Solution Approach 2:
The patent employs parameter changes by adjusting etching gas composition (switching between different gases for different etching steps), temperature, and pressure to achieve selective removal of materials and precise control of electrode layer thickness, thereby increasing capacitance through optimized structural parameters
2Reliability
If selective etching treatment is performed to remove stack material layers to increase capacitance, then the capacitance is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent applies local quality by using selective etching that targets specific regions and material layers (first stack material layer, second stack material layer) with different etching rates and selectivities, removing materials only where needed to form the capacitor structure with precise local control
Solution Approach 2:
The patent introduces intermediary protective layers and masking structures that facilitate selective etching by protecting certain areas while allowing etching in others, enabling precise removal of stack material layers without affecting adjacent structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively increases the capacitance of memory cell capacitors, ensuring proper operation of electrical devices by forming a capacitor with a smaller, optimized electrode layer thickness and dielectric insertion, enhancing device functionality.
Implementation Method 1
performing a selective vapor phase etching treatment to the first electrode layer to form a smaller thickness of the first electrode layer
Implementation Method 2
performing the selective vapor phase etching treatment to the first electrode layer includes exposing the multilayer structure to an etching gas containing a fluorine compound
Implementation Method 3
exposing the multilayer structure to a protective gas containing hydrogen before performing the selective vapor phase etching treatment to the first electrode layer, such that a protective film is formed on each surface of the first supporting layer, the second supporting layer, and the third supporting layer
Implementation Method 4
the protective film includes Si3N4H
Data Source
AI summary
A method for manufacturing a capacitor includes: providing a substrate and a multilayer structure; forming a recess in the multilayer structure; forming a first electrode layer on a surface of the recess; performing a selective etching treatment to remove the first and second stack material layers; performing a selective vapor phase etching treatment to the first electrode layer to form a smaller thickness of the first electrode layer; and forming a dielectric layer and a second electrode layer in which the dielectric layer is between the first and second electrode layer.