CMOS Image Sensor Photodiode Isolation via P-type Barrier Layers
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Solution Overview
Problem
CMOS image sensors face challenges in increasing pixel density without reducing sensitivity, and in preventing issues like blooming and color crosstalk due to the electrical connection of photodiodes and potential leak currents during the dicing process.
Innovation Solution
A CMOS image sensor is manufactured using an N/P+ substrate with a P-type semiconductor substrate and a first N-type semiconductor layer, where second P-type semiconductor layers are formed to surround and isolate photodiodes, and boron is ion-implanted to create a P-type well and barrier layers, preventing electrical connection and leak currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of pixels is increased without changing the sensor size, then pixel density is improved, but the light receiving area of each photodiode is reduced and sensitivity is lowered
Solution Approach 1:
The invention extends the depletion layer depth in the vertical dimension (from surface to deeper regions) to increase the light receiving volume, compensating for the reduced horizontal light receiving area caused by higher pixel density
2Reliability
If the depletion layer of photodiode is widened to improve sensitivity, then sensitivity is improved, but the driving voltage needs to be increased
Solution Approach 1:
The invention changes the substrate type from P-type to N-type, which fundamentally alters the depletion layer formation characteristics and allows for widened depletion layer at lower voltages due to the higher carrier concentration and improved electric field distribution
3Ease of manufacture
If dicing is performed to separate chips, then individual chips are obtained, but leak currents occur at cut sections
Solution Approach 1:
The invention performs preliminary ion implantation to form P-type barrier layers at the dicing line positions before the actual dicing process, preventing leak currents from occurring at the cut sections
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances photodiode sensitivity without increasing driving voltage, reduces the likelihood of blooming and color crosstalk, and prevents leak currents during chip dicing, thereby improving image quality and electrical characteristics.
Implementation Method 1
forming a first P-type semiconductor layer by performing heat treatment on a semiconductor substrate which comprises (i) a substrate body containing P-type impurities, and (ii) a first N-type semiconductor layer containing N-type impurities and provided on the substrate body, to diffuse the P-type impurities into a portion of the first N-type semiconductor layer
Implementation Method 2
forming a plurality of optical/electrical conversion portions by injecting N-type impurities into a plurality of portions of a surface portion of the first N-type semiconductor layer to form a plurality of second N-type semiconductor layers
Implementation Method 3
forming a plurality of second P-type semiconductor layers by continuously injecting P-type impurities thereinto until the second P-type semiconductor layer are formed to surround the optical/electrical conversion portions and along element isolation regions provided in respective positions of the surface portion of the first N-type semiconductor layer, and extend from the surface portion of the first N-type semiconductor layer to a surface portion of the first P-type semiconductor layer
Data Source
AI summary
A solid-state image pickup device comprising a semiconductor substrate which comprises a substrate body containing P-type impurities and a first N-type semiconductor layer containing N-type impurities, the first N-type semiconductor layer being provided on the substrate body, and including a first P-type semiconductor layer which contains p-type impurities, and which is located on the substrate body, a plurality of optical/electrical conversion portions formed of second N-type semiconductor layers which are provided independently of each other in respective positions in a surface portion of the first N-type semiconductor layer, and a plurality of second P-type semiconductor layers which are formed to surround the optical/electrical conversion portions, which are provided along element isolation regions provided in respective positions in the surface portion of the first N-type semiconductor layer, and which continuously extend from the surface portion of the first N-type semiconductor layer to a surface portion of the first P-type semiconductor layer.